Xbox2 CPU : 240 Gflops..?

[EndR]

Question...
I am desperatly looking for a link where "someone" speculated about the power of the Xbox2 CPU.
I don´t even remember which forum it was..

But the speculation was somehting in the line of..
1 Core = around 80Gflops
3 cores (as the leak suggests) = around 240Gflops..

Now, how possible is it that 1 core = 80Gflops?

Because if this is true, and that Sony "only" uses 1 PE, then the differences between Xbox2 and PS3 will not be "that much at all"..
(I know its up to the GPU aswell, but let´s take this out of the equation and only focus on cpu vs cpu)

Don´t flame me here, I was just wondering of the possibilites this setup (3 core = 240 Gflops)

 

[j^aws]

http://www.beyond3d.com/forum/viewtopic.php?t=19154&highlight=

 

[EndR]

http://www.beyond3d.com/forum/viewtopic.php?t=19154&highlight=

There you go.. but it wasen´t here I read that, but the figures seems to be the same.

 

[j^aws]

http://www.beyond3d.com/forum/viewtopic.php?t=19154&highlight=

There you go.. but it wasen´t here I read that, but the figures seems to be the same.

Not quite, in the link above, it's the GPU that's ~ 240 GFlops @ 500 Mhz...The tri-core CPU ~ 84 GFlops @ 3.5 GHz

 

[Megadrive1988]

Question...
I am desperatly looking for a link where "someone" speculated about the power of the Xbox2 CPU.
I don´t even remember which forum it was..

But the speculation was somehting in the line of..
1 Core = around 80Gflops
3 cores (as the leak suggests) = around 240Gflops..

Now, how possible is it that 1 core = 80Gflops?

Because if this is true, and that Sony "only" uses 1 PE, then the differences between Xbox2 and PS3 will not be "that much at all"..
(I know its up to the GPU aswell, but let´s take this out of the equation and only focus on cpu vs cpu)

Don´t flame me here, I was just wondering of the possibilites this setup (3 core = 240 Gflops)

Hi. this is not what I understood. from what I've read, the entire Xenon CPU, which is supposedly triple-core, is around 84 GFLOPs. not 240 GFLOPs. so it isn't 80 GFLOPs per core, but 84 GFLOPs total, in a three-core CPU module.

that said, in the Xenon CPU patent, it was made known that another or more CPU modules could be added. each CPU module, I believe, is a triple core CPU. It seems to also be possible to decrease or increase the number of cores within a CPU module. so that means Xenon's CPU setup could theoretically be greater than 84 GFLOPs. by either increasing the amount of cores within a CPU module, or by adding more CPU modules, or both.

like I said, that is my current understanding of Xenon's CPU structure. please correct me if I'm wrong, guys.

 

[EndR]

http://www.beyond3d.com/forum/viewtopic.php?t=19154&highlight=

There you go.. but it wasen´t here I read that, but the figures seems to be the same.

Not quite, in the link above, it's the GPU that's ~ 240 GFlops @ 500 Mhz...The tri-core CPU ~ 84 GFlops @ 3.5 GHz

Oh yeah.. I saw that now..
But hmm.. could it be a missunderstanding then?
So, possibilites for a a 80Gflops core seems... far fetched?

 

[j^aws]

http://www.beyond3d.com/forum/viewtopic.php?t=19154&highlight=

There you go.. but it wasen´t here I read that, but the figures seems to be the same.

Not quite, in the link above, it's the GPU that's ~ 240 GFlops @ 500 Mhz...The tri-core CPU ~ 84 GFlops @ 3.5 GHz

Oh yeah.. I saw that now..
But hmm.. could it be a missunderstanding then?
So, possibilites for a a 80Gflops core seems... far fetched?

If you look at the CELL die, and the rumours suggest that the Xe CPU is based off the core of the PPE from the CELL die, then yes, you could prolly pack 3 cores. The Xe CPU should have some custom features that the PPE wouldn't (because the PPE doesn't need them). These would be beefed up VMX/ Altivec units with prolly 128.128 bit registers and larger, shared L2 cache (~1MB) with custom instructions unique to Xenon...

 

[j^aws]

But three beefed up PPE cores would be pushing it at 90nm and we may only see two.

 

[jvd]

I thought it was 2 tri core cpus ?

Perhaps 3 dual core cpus

 

[akira888]

Actually according to Aaron Spink (a real engineer) a better estimate is 105 GFLOPS, taking into account the main FPUs on the PPC cores as well as the FP SIMD units.

http://www.beyond3d.com/forum/viewtopic.php?p=433797#433797

 

[j^aws]

Actually according to Aaron Spink (a real engineer) a better estimate is 105 GFLOPS, taking into account the main FPUs on the PPC cores as well as the FP SIMD units.

http://www.beyond3d.com/forum/viewtopic.php?p=433797#433797

Well if you want to play like that then! ...You might aswell add the CELL's PPE's VMX unit ~ 8 Flops per cycle...which at 4.6 GHz would be an additional ~ 37 GFlops

And I can't remember if the PPE also has a seperate FPU unit?

 

[version]

"And I can't remember if the PPE also has a seperate FPU unit?"

yes
speaking integer SIMD with 16 ways

 

[j^aws]

"And I can't remember if the PPE also has a seperate FPU unit?"

yes
speaking integer SIMD with 16 ways

Huh...the PPE has a 16-way integer unit??? Where, how?

 

[version]

"And I can't remember if the PPE also has a seperate FPU unit?"

yes
speaking integer SIMD with 16 ways

Huh...the PPE has a 16-way integer unit??? Where, how?

PPE not, SPE yes

 

[j^aws]

"And I can't remember if the PPE also has a seperate FPU unit?"

yes
speaking integer SIMD with 16 ways

Huh...the PPE has a 16-way integer unit??? Where, how?

PPE not, SPE yes

Where did you read that?

Also I presume Floats and Integers are not concurrent on the SPE's?

 

[version]

"And I can't remember if the PPE also has a seperate FPU unit?"

yes
speaking integer SIMD with 16 ways

Huh...the PPE has a 16-way integer unit??? Where, how?

PPE not, SPE yes

Where did you read that?

Also I presume Floats and Integers are not concurrent on the SPE's?

 

[archie4oz]

Actually according to Aaron Spink (a real engineer) a better estimate is 105 GFLOPS, taking into account the main FPUs on the PPC cores as well as the FP SIMD units.

However given the known dispatch limits, even with unlimited bandwidth and no latency, you wouldn't be able to sustain issues to a scaler FPU and AltiVec units....

Huh...the PPE has a 16-way integer unit???

Well not really, But altiVec can operate across an array of 16 bytes...

 

[version]

"Well not really, But altiVec can operate across an array of 16 bytes..."

hmm, altivec compute with 8*halfword(16 bit) too ??

 

[j^aws]

"And I can't remember if the PPE also has a seperate FPU unit?"

yes
speaking integer SIMD with 16 ways

Huh...the PPE has a 16-way integer unit??? Where, how?

PPE not, SPE yes

Where did you read that?

Also I presume Floats and Integers are not concurrent on the SPE's?

Oh...I forgot about that! ...So is that 1 TOPS of 8bit Integers, peak, fully pipelined!

 

[version]

"Oh...I forgot about that! ...So is that 1 TOPS of 8bit Integers, peak, fully pipelined! [/quote]"

no, not multiply-add instruction, hence only 500 GOPS

+PPE altivec with 64 GOPS

but parallel with permute 1 TOPS