Wii U hardware discussion and investigation *rename
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The WIIu would have 3-4 CPU core-this is the bare minimum to be able to port easily the games from the xb/ps.
And the N don't like to spend too much money for not needed stuff.
The GPU will have 32 megs of on-die edram,for the BC with the WII.
(24 megs of 1t ram equivalent,and 3 megs for the texture/frame buffer).
The lagging of the Ghost recone/overheating show it.
They have to drive the early devkits memclock to as high as possible,to be as close as possible to the bandwidth of the final unit, and the Ghost recon lagging can be easily explained by the missing fine tuning -because with edram ,they will not need any .
Probably they will drop into the wiiu 512 megs of memory- don't think that it will be more than that,they can't justify the expenses with any obvious benefit. (the xb/ps due has 512 megs- so to be able to port anything from them they don't need more than that)
And the N don't like to spend too much money for not needed stuff.
The GPU will have 32 megs of on-die edram,for the BC with the WII.
(24 megs of 1t ram equivalent,and 3 megs for the texture/frame buffer).
The lagging of the Ghost recone/overheating show it.
They have to drive the early devkits memclock to as high as possible,to be as close as possible to the bandwidth of the final unit, and the Ghost recon lagging can be easily explained by the missing fine tuning -because with edram ,they will not need any .
Probably they will drop into the wiiu 512 megs of memory- don't think that it will be more than that,they can't justify the expenses with any obvious benefit. (the xb/ps due has 512 megs- so to be able to port anything from them they don't need more than that)
The_legend_of_drtre
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Developers have said it has more memory than current systems so it'll at least have 1 gig of total system ram. Nintendo hasn't skimped on ram since the n64 era. Both Wii and 3ds had more than enough ram given their performance.
Gearbox saying that it can display higher resolution textures than both 360/PS3 also hints at this ram inscrease.
Gearbox saying that it can display higher resolution textures than both 360/PS3 also hints at this ram inscrease.
The 750 line, according to IBM, is completely unsuited for SMP - highly inefficient even with massive modifications. So I'd say there's a 99.9% chance that won't happen.
Also, all rumors I've seen so far point at three cores, a clock speed between 3.0 and 3.5GHz and a sizable L2 cache. I still think the 470S would have been a good foundation, but that chip simply doesn't fit in with any rumor.
Also, all rumors I've seen so far point at three cores, a clock speed between 3.0 and 3.5GHz and a sizable L2 cache. I still think the 470S would have been a good foundation, but that chip simply doesn't fit in with any rumor.
The 470 cores fit well with requirements:
1.6GHz in slow/ low power process (ie faster in processes with more emphasis on speed).
2 W/core at 1.6GHz.
<4 mm² per core (excluding L2).
Possibility to add VMX unit to the core.
A 1.6-2GHz 4 core implementation, with each core having 256KB L2 cache, would be less than 35mm² and use less than 15W. Performance would be equal or above Xenon.
I would't put too much stock in the rumours of a high clocking, high power consumption CPU
Cheers
Just to have a point of comparability, in gflops how much would it able to do?
Although lower latency memory, 5 instruction per cycle and OoOE may be a quite good, I guess it will still need to do a high number of gflps for physics/animations and the such heavy games?
Anyway it seems a fine choice.
Well, while it is difficult to separate the power consumption of the Xenon part of the 45nm chip in the latest XBOX360, I think a rough estimate might be 30W. An updated version targeted at 45nm SOI might well be below that while still containing various improvements. And a 20+W CPU is probably acceptable. IMHO it should be kept to the minimum power draw required to qualify as a Xenon+ though, allowing as much as possible of the power budget to go to the GPU.
Speaking of the GPU, which, after all, is in the title of this thread, the article hypothesized that Nintendo might go for an EDRAM + GDDR3 combo for price reasons. According to my back of the envelope calculations the EDRAM amounts discussed would require some 30mm2 of die area on TSMC 40nm excepting any control cirquitry, and I'm just not sure that GDDR5 commands such a price premium that it constitutes a significant saving to avoid it. And since we can probably assume that the CPU will access the same pool of memory, a slower main memory solution impacts the whole of the system.
For those more graphically inclined, are there other benefits to EDRAM + GDDR3 over a straight GDDR5 interface?
Nintendo has emphasized ease of development in their past two systems. The CPU in GC and Wii have been modest but with excellent cache and low latency memory systems. While maximum performance is lower than the competition, it is much easier to realize the full performance potential of Nintendo's systems.
I can't see them abandoning this concept by using a CPU core that was horrible 5½ years ago. The 360 CPU core/CELL PPU are awful (the images on page 2 and 3 in this presentation sums up my feelings).
Cheers
1.10 Can these processors be used in SMP designs?
750CXe/FX/GX (and other 750 processors) can work in an SMP environment; it just takes extra work in the software and OS kernel, and there will be extra bus traffic. The fundamental problem is that the cache management instructions (in particular dcbf, dcbst, dcbi) only operate on the local CPU's caches by default; they are not broadcast on the 60x bus for other processors to see unless ABE is set. Other SMP-capable PowerPC implementations broadcast these operations so they act on all caches in the system. In addition, the 750 family doesn't broadcast TLB invalidations, and it doesn't snoop instructions on the bus, so it wouldn't pick up these other operations even if they were broadcast.So using these processors in an SMP design would require having the software and OS ensure that each CPU in the system performed each of these tasks every time it needed to be done by one of the CPUs.
Basically, SMP operation can be done, but it will require a lot of software overhead, which may impact overall performance for both the kernel and user application code. As with other performance characteristics, it will depend heavily on the application.We have no quantitative data, but if two MEI processors are used without consideration to how tasks are partitioned between the processors, there will be a penalty due to shared data that will be continuously flushed out of one processor when the other processor needs it, along with the maintenance problems of tlbie and dcb operations. If tasks can be partitioned such that there is very little data sharing, then there will be correspondingly very little overhead for maintaining coherency between the two processors.
https://www-01.ibm.com/chips/techlib/techlib.nsf/techdocs/291C8D0EF3EAEC1687256B72005C745C#10
If they want a modified 750,with 3-4 core,and same big cache,then they can re-design the cache management part of the CPU without any problem.
Back of the envelop calculations about the memory: the xb/ps has a bandwidth of 20-30 gig/sec,so it is optimised for 512 megs/60 fps
So,if you want to implement1 gig of memory in the wiiu ,then it will need DDR4 with 128 bit ,of DDR3 with 256 bit.
Both of these options are expensive,and it would be the same approach that the MS/SONY did with the ps/xb,and would lead to an expensive,loss making product.
So,if you want to implement1 gig of memory in the wiiu ,then it will need DDR4 with 128 bit ,of DDR3 with 256 bit.
Both of these options are expensive,and it would be the same approach that the MS/SONY did with the ps/xb,and would lead to an expensive,loss making product.
According to a former AMD employee who worked on the project, Wii U uses an SoC - in which case the 470S seems a lot more plausible all of a sudden. Also, from what I can tell, a lot of the development work is done in India, and someone from the PPC4xx team at IBM India was working on a project together with US and Japanese teams...
Leave the floating point number crunching to the GPU?
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The_legend_of_drtre
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http://hothardware.com/News/IBM-Announces-New-SoC-Products-Claims-Performance-Breakthrough/
"According to IBM, the 476FP will be capable of clockspeeds "in excess of 1.6GHz", and draw just 1.6W when configured in that mode."
Looks like the chip goes higher than 1.6ghz to me.
lol checkout "Wiiboy101" posts from 9 MONTHS ago and tell me this isn't interesting...
http://wiiugo.com/cell-processor-to-power-wii-successor/
"According to IBM, the 476FP will be capable of clockspeeds "in excess of 1.6GHz", and draw just 1.6W when configured in that mode."
Looks like the chip goes higher than 1.6ghz to me.
lol checkout "Wiiboy101" posts from 9 MONTHS ago and tell me this isn't interesting...
http://wiiugo.com/cell-processor-to-power-wii-successor/
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The_legend_of_drtre
Newcomer
Hey Wsippel,
You should tell GAF to unban me so I can take care of that little "Pork problem" you guys have been having.
You should tell GAF to unban me so I can take care of that little "Pork problem" you guys have been having.
Wait... what?
Does the 464FP or 470S incorporate IBM's unique embedded DRAM, for feeding large chunks of data to multiple cores making for a smooth entertainment experience?
It makes sense, given the above info/estimations you can get 4 cores and edram in about 60mm^ (assuming the PPC 476 core + L2 to be about 8mm^).
That leaves at the very least 140mm^ for a GPU (a 4750 40nm is 138mm^ and a 4870 55nm is 256mm^, with a lot of stuff not needed in a console).
To do a reference a Phenom X4 is 258mm^ it is cheap while running at 2x the speed.
They may just go for easier development and beef up the CPU?
If the CPU were really an overclocked Wii CPU then Wii U would also have 100% BC with the GAMECUBE.
Game over good Sir.
Reread the bolded part.
Nothing I wrote was speculation. It is not really a new core.
A small amount of EDRAM handles the higher bandwidth rendering needs while a large amount of DDR handles the general memory needs. You get the throughput benefits of the EDRAM and save money by buying cheaper non-GDDR5 external memory. GDDR5 also has the lowest density; you get more external memory capacity using other DDR types. It has more than the 512mb that is speculated about here.
I said you were overestimating the EDRAM in the CPU, I said nothing about the rest of the system.
I expected more than 512. It's 768 or 1Gb most likely.
I'm still believing espresso, but since a Wii is an overclocked GC, it seems anything BC with Wii would almost by necessity be BC with GC.
But I guess that applies to any chip they put in the system, whether derived from Wii or all new, so it's neither here nor there. Perhaps they just didn't want to bother with GC BC.
Edit: and I guess the GC mini discs could be a compatibility problem?
Definitely seems a picture of Wii U is emerging, DDR-3 keeps coming up for example.
I'm still believing espresso, but since a Wii is an overclocked GC, it seems anything BC with Wii would almost by necessity be BC with GC.
But I guess that applies to any chip they put in the system, whether derived from Wii or all new, so it's neither here nor there. Perhaps they just didn't want to bother with GC BC.
Edit: and I guess the GC mini discs could be a compatibility problem?
Definitely seems a picture of Wii U is emerging, DDR-3 keeps coming up for example.
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IBM density for eDRAM is 11Mbits/mm^2, PowerPC 470S single core is 3,7mm^2 and 512KB of L2 Cache are 5mm, in 60mm of space. If the CPU is a triple core with 512KB per core then the free space for eDRAM becomes 33,9mm^2. This means that the system can include 372Mbits of eDRAM in that space or in other words 46,5MB of eDRAM for the entire system.
32MB should be enough for 1280x720+FP16 rendering and MSAAx2, leaving 14.5MB for cache uses of the AMD GPU.
Where does this info come from? I hear it the first time!
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