Wii U hardware discussion and investigation *rename

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They could choose to use 40nm just as stopgap for about 6 months. But I think, it would last for much more than that.
 
Interesting article. I wonder why 640 shader units wasn't mentioned as an option? Because, from what I've been told, that's supposedly what we're looking at. Quite possibly complete bull, of course...
 
That's probably the lowest hanging fruit, just re-using the base RV740 design (although it's more hairy than that, of course). However, I'm having trouble seeing them provide even remotely adequate bandwidth for such a wide beast, irrespective of what they'd do with regards to memory.
 
That's probably the lowest hanging fruit, just re-using the base RV740 design (although it's more hairy than that, of course).

hmm... 80W under load @ 750 core. What's the power consumption like at say 600 or 650MHz (+ accompanying voltage adjustment).

I'd almost prefer 480SPs so they can still keep higher clocks for say... geometry, but who knows what the goal is exactly. :p As we all know, anything above 320SPs already significantly outclasses current gen in shading ability, but if the clocks are gimped, then geometry rate suffers.

However, I'm having trouble seeing them provide even remotely adequate bandwidth for such a wide beast, irrespective of what they'd do with regards to memory.

Just out of curiosity...

From the RV740 article:

GDDR5 raises some interesting challenges, at least in its current implementation in ATI memory controllers, one being that down-clocking it when idle is not possible in a seamless way

They'd fix that, right? :p

I hope. >_>
 
hmm... 80W under load @ 750 core. What's the power consumption like at say 600 or 650MHz (+ accompanying voltage adjustment).

I'd almost prefer 480SPs so they can still keep higher clocks for say... geometry, but who knows what the goal is exactly. :p As we all know, anything above 320SPs already significantly outclasses current gen in shading ability, but if the clocks are gimped, then geometry rate suffers.
500MHz is what I've been told. Also, DDR3. But like I said: No idea how reliable that information is.
 
DDR3 would explain quite a lot at E3.

500MHz sounds a bit surprising, and I'm sure that's still one of the unsettled specs. What was worrying was the reports of overheating dev kits. Granted, an RV740 shoved into that chassis would have really awful cooling compared to the stock PC card, but that's why I wanted to know what the power characteristics were for lower clocked iterations.
 
DDR3 would explain quite a lot at E3.

500MHz sounds a bit surprising, and I'm sure that's still one of the unsettled specs. What was worrying was the reports of overheating dev kits. Granted, an RV740 shoved into that chassis would have really awful cooling compared to the stock PC card, but that's why I wanted to know what the power characteristics were for lower clocked iterations.
He was talking about the devkit before the current one, and the way I understand some of the statements earlier this month, there have been quite a few (significant?) changes with the latest revision. And I don't even think developers have target specs for the final hardware, either.
 
Just keep in mind that launching on 28nm, a new and certainly immature process, isn't going to be cheap.

For comparison's sake, TSMC had 65nm at the end of 2005, yet we didn't see its use in consoles or even other GPU markets until mid to late 2007. It's not like the complexity of the smaller process nodes is going to make the transition to 28nm any smoother for mass production - just take a look at how long 28nm has been delayed in the first place.


What about 32nm?

It should be quite mature for years end and ATI knows how to make a GPU on that process too.
 
I heard the revised Wii U kits are not more powerful though, they are basically just bug fix hardware.

Anyways if this info is real, and it has a plausible sound, seems like a lot of shader power drastically crippled by a lack of bandwidth.

Still guessing RV730 here. 500 mhz RV740 is still 2.5X shader ability of Xenos, so why dont we see that in the early games or hear of it from developers? Unless the bandwidth is just shutting it down that much...anyways the 500 mhz RV740+DDR3 does at least sound plausible to me.
 
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RV730 at 40nm should have a size of 72mm^2, the same one of the GPU inside Hollywood, in the other part memory controller, I/O controller and eDRAM could be integrated.
 
I actually think the final GPU will be quite different from any known R700 part. To my knowledge, AMD is working on this thing for at least 22 months now, and it seems they're still not done. That seems like a very long time for some minor modifications.
 
Well, it could be just as custom as RSX was compared to G71 in terms of hardware blocks within it, but I'd wager some of the customization has to do with their plans for tackling the bandwidth issue, whether that be waiting on some wacky CPU eDRAM communication (in which case, waiting for IBM to finish their work) or the GPU's own integrated eDRAM or SRAM. *shrug*
 
Yeah I don't understand the grasping at 3 year old discrete PCIe PC GPUs. Just consider all the extra hardware that is in RSX, Hollywood, Xenos, NV2A, Flipper, etc. It also makes no sense to me that they would jump on a chip from 2008 as the foundation for their future.
 
You might actually consider that RSX is in the same family architecturally as NV4x...
 
when factoring in cooling whats going to be cheaper, a smaller, higher clocked chip ( higher TDP) or a bigger lower clocked chip ( lower TDP). whats going to cost them more 40-80mm sq @40nm (number pulled out of my ass) or better cooling?
 
You might actually consider that RSX is in the same family architecturally as NV4x...
That's not what I meant. I'm fully aware of RSX's GPU being G7x. I'm referring to how these console chips have many extras integrated. For one, they all serve as a northbridge. I don't know what else is in Xenos and RSX but Hollywood has an ARM CPU for system and security tasks and an audio DSP.

NV2A was a GeForce 4 Ti but it still was also a northbridge. A super nForce IGP if you will.

The only off the shelf choice I could see Nintendo using would be Llano because of its already high integration.
 
I don't know much about those things, but assuming the system is indeed using DDR3, and considering POWER7 has on die DDR3 memory controllers, would it possible to connect the RAM to the CPU and CPU and GPU via GX? And would that make sense? From what I understand, GX offers more bandwidth than any other bus, and POWER7's two integrated quad channel DDR3 memory controllers also achieve an impressive bandwidth of 100GB/s. Too complicated and expensive I guess?


That's not what I meant. I'm fully aware of RSX's GPU being G7x. I'm referring to how these console chips have many extras integrated. For one, they all serve as a northbridge. I don't know what else is in Xenos and RSX but Hollywood has an ARM CPU for system and security tasks and an audio DSP.

NV2A was a GeForce 4 Ti but it still was also a northbridge. A super nForce IGP if you will.

The only off the shelf choice I could see Nintendo using would be Llano because of its already high integration.
There's an AMBA bus and an AMBA to AMBA bridge onthe Wii U GPU die, so there will certainly be an ARM core as well.
 
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RV730 at 40nm should have a size of 72mm^2, the same one of the GPU inside Hollywood, in the other part memory controller, I/O controller and eDRAM could be integrated.
What I don't get is why the GPU is not integrated as it is pretty tiny?
We know that the CPU will include "lot of EDRAM" (they did not state if it's all cache by the way) it could be a good idea to have the GPU use it (or most of it) instead of the CPU.
I don't bet on a powerful CPU for the same reason the article doesn't bet on a powerful GPU as no programmer in his right mind would say that a 2/4 cores power 7 CPU is in the same ballpark as say Xenon.

There is something fishy imho especially while taking in account the rumors about the RAM being DDR3. Nintendo will face bandwidth constrains (even with conservative hardware), so either they need two pools of RAMs or some extra EDRAM. I suppose that the IBM process allowing EDRAM is not their cheapest one, on top of it they would have either an external GPU with embedded EDRAM (which limit the possible providers to NEC, right?) and that's likely to come at a price too. Last choice like in Xenos they add an extra chip but I don't know to which extend this is practical assuming a RV7xx derivative, the RBEs are tied to the L2 right? So the link between the GPU and an hypothetical daughter die would have to support coherency, right? (either way they are redesigned...)

Honestly I hope we learn more soon as it is the whole thing as guesstimated currently looks like a pretty non optimal set-up even considering Nintendo performances targets (I guess slightly above ps360).
 
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