Well, normally the chip's clock multiplier is set by the manufacturer; for instance my AMD 3400+ has a clock multiplier of '12.' This then gets multiplied by the frontside bus frequency to determine the chip's operational frequency.
In my case, the 200 MHz associated with HyperTransport gives me a 2.4 GHz chip. I've overclocked it ever so subtley via the FSB (200--->208) to give me ~2500 MHz.
Anyway, so this is the reason I think that this is so - well, surprising. I don't remember what the 360's root frontside bus frequency is, but it seems like the difference between someone at MS (IBM, wherever) providing chips with the clock multiplier set at 7 vs 8; NOT something that just happens on it's own.
Now, the only reason I could imagine this is if legitimately someone screwed up; maybe indeed it was a bunch of lower clocked non-final chips that made their way into the final kits.
Either that or due to yield issues a number of chips weren't reaching 3.2 GHz at the designated voltage, got clocked down, and pressed into service anyway to meet demand.
In my case, the 200 MHz associated with HyperTransport gives me a 2.4 GHz chip. I've overclocked it ever so subtley via the FSB (200--->208) to give me ~2500 MHz.
Anyway, so this is the reason I think that this is so - well, surprising. I don't remember what the 360's root frontside bus frequency is, but it seems like the difference between someone at MS (IBM, wherever) providing chips with the clock multiplier set at 7 vs 8; NOT something that just happens on it's own.
Now, the only reason I could imagine this is if legitimately someone screwed up; maybe indeed it was a bunch of lower clocked non-final chips that made their way into the final kits.
Either that or due to yield issues a number of chips weren't reaching 3.2 GHz at the designated voltage, got clocked down, and pressed into service anyway to meet demand.
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