When is the 360 CPU slated to go 90nm --> 65nm?

[Karma Police]

Right now it's a 90nm CPU, but I've heard it's going 65nm. Any idea when?

 

[Teasy]

It uses a 90nm CPU and GPU. It will probably go to 65nm either by the end of 2006 or early 2007.

EDIT, fixed dates

 

[Carl B]

I'd say by mid-2007 myself.

 

[Teasy]

I'm going by what others have said about IBM only going into full production of 65nm in the final quarter of 2006. Will IBM really be able to start 65nm production by mid 2006? It would be good if they could do that.

 

[Joe DeFuria]

I'm going by what others have said about IBM only going into full production of 65nm in the final quarter of 2006.

Then why did you say end 2007 / 2008?

I'm thinking early 2007 myself. (This goes for the CPU, and also for the non-EDRAM portion of the GPU.) IIRC, integrated EDRAM chips usually lag stnadard processes a bit.

 

[Teasy]

Oh yeah little error there. I meant end of 2006 or early 2007. My brain is turned off today for some reason (I even mis-read xbdestroya's prediction as mid 2006 ) Maybe its because its my day off and I'm so relaxed

 

[Carl B]

Oh yeah little error there. I meant end of 2006 or early 2007. My brain is turned off today for some reason (I even mis-read xbdestroya's prediction as mid 2006 ) Maybe its because its my day off and I'm so relaxed

LOL, I was wondering what was going on there.

 

[Karma Police]

Well, in either case, I'm gonna sell my "old" 360 for the "new" 360 then, just 'cause it'll probably be quieter & run cooler. BTW, who makes the GPU? TMC / UMC?

 

[Joe DeFuria]

Well, in either case, I'm gonna sell my "old" 360 for the "new" 360 then, just 'cause it'll probably be quieter & run cooler. BTW, who makes the GPU? TMC / UMC?

I believe TMC makes the parent die (which has most of the GPU logic), and NEC makes the EDRAM module (Embedded ram plus some ROP / AA logic).

Edit: for reference, in fact:

http://www.beyond3d.com/articles/xenos/index.php?p=02#c1

The Xenos graphics processor is not a single element, but actually consists of two distinct elements: the graphics core (shader core) and the eDRAM module. The shader core is a 90nm chip manufactured by TSMC and is currently slated to run at 500MHz*, whilst the eDRAM module is another 90nm chip, manufactured by NEC and runs at 500MHz* as well. These two chips both exist side by side, together on a single package, ensuring a fast interlink between the two. The main graphics chip, the parent core, could be considered as a "shader core" as this is one of its primary tasks. The eDRAM module is a separate, daughter chip which contains the elements for reading and writing color, z and stencil and performing all of the alpha blending and z and stencil ops, including the FSAA logic. We'll explore the capabilities and operations of both these chips in greater detail throughout the article.

It will be interesting to watch how the progressions of cost reductions with the GPU. I expect that the parent die will undergo at least one shrink to 65 nm before there is an attempt to merge the parent and daughter dies together as one piece of silicon. That merge may also happen at 65nm, but I wouldn't be surprised if it doesn't happen until the next shrink beyond that.

 

[ADEX]

One of IBM's partners is going to 65nm this month and given they are using IBM's manufacturing technology I would imagine IBM can also go soon. I'd imagine both Cell and XCPU will go 65nm sometime in 2006.

I expect that the parent die will undergo at least one shrink to 65 nm before there is an attempt to merge the parent and daughter dies together as one piece of silicon. That merge may also happen at 65nm, but I wouldn't be surprised if it doesn't happen until the next shrink beyond that.

That might never happen. The reason they are separate is because the eDRAM is made differently and putting them on one die is very difficult.

 

[Joe DeFuria]

That might never happen. The reason they are separate is because the eDRAM is made differently and putting them on one die is very difficult.

I agree that it may never happen, though I do believe I've read that it is at least a goal of MS to combine the two...so they at least have reason to believe it will be possible.

 

[Farid]

I agree that it may never happen, though I do believe I've read that it is at least a goal of MS to combine the two...

Logically, I'd say, the mother/daughter on a die configuration was meant to give them rooms for the future process switches.

Ultimately, if it makes sense from an economical standpoint, they could as well opt for a SOC configuration (Like EE+GS), seeing how they have the complete control and rights on both the Xenon and Xenos implementations.

 

[jvd]

Well only certian processes are approved for edram . SO i'm going to assume that 65nm will be avalible for the main bit of logic before its ready for the edram part . So they can jump down the process lists with out being tied down by the edram part

 

[Megadrive1988]

65nm Xenon CPUs and Xenos GPUs by Q4 2006
45nm Xenon CPUs and Xenos GPUs by 2008 ?

sub-45nm CPUs and GPUs for third-generation Xbox by 2010 ?

 

[psurge]

They do have the option of replacing the eDRAM with SRAM.

(IIRC the Intel Montecito will be a dual core chip in 90nm with up to 12MB of L3 SRAM per core on die)

A similar approach might be cost effective for a 65nm Xenos...

 

[Karma Police]

65nm Xenon CPUs and Xenos GPUs by Q4 2006
45nm Xenon CPUs and Xenos GPUs by 2008 ?

sub-45nm CPUs and GPUs for third-generation Xbox by 2010 ?

If they do get it to 45nm, they could put both Xenon & Xenos in the Xbox 3 (third itineration) and have full b/c out of the box, a-la PS1 ----> PS2.





Ah who am I kidding!!!!

 

[Kaotik]

They do have the option of replacing the eDRAM with SRAM.

(IIRC the Intel Montecito will be a dual core chip in 90nm with up to 12MB of L3 SRAM per core on die)

A similar approach might be cost effective for a 65nm Xenos...

I don't see how this could really be a option, considering how the eDRAM is tied with the logic units

 

[arjan de lumens]

They do have the option of replacing the eDRAM with SRAM.

(IIRC the Intel Montecito will be a dual core chip in 90nm with up to 12MB of L3 SRAM per core on die)

A similar approach might be cost effective for a 65nm Xenos...

Not likely. Intel is known for making far denser SRAMs than everyone else at any given process node, but Montecito still has a stated chip area of 596 mm2.

 

[Arun]

They do have the option of replacing the eDRAM with SRAM.
[...]
A similar approach might be cost effective for a 65nm Xenos...

TSMC will support eDRAM much more universally in its 65nm fabs. There is no reason to replace it by SRAM.

Uttar

 

[Guilty Bystander]

When is the 360 CPU slated to go 90nm --> 65nm?

Why?
What does it matter?

Are you waiting out for a more silent 360 or something?

It will happen when they'll get good yields and are to produce 65nm on mass.