The role of the PPE?

[Fafalada]

You guys wrote a good chunk of code in microcode? What a pain in the ass.

Actually I wrote it myself in this case.
I'm pretty sure this isn't just PS2 dev thing though, afaik many XBox guys wrote large amounts of asm shader code too. Like Deano said once, we can be a weird bunch of ppl, finding certain things fun that other people wouldn't.

That said, I think asm stuff is pretty timid (and hardly pain in the ass) compared to things some of us did(or tried to do) with DMA and memory stuff.

 

[Shompola]

microcode, I thought you ment microprogramming though.

 

[scooby_dooby]

You have to use scooby_logic on'em before he gets it! IBM would not have put 7/8 spe's on a chip if a "task" was not possible on them to some extent.

Everything's 'possible', but it's pretty meaningless without knowing how much work is required to make it happen. I'm sure it was 'possible' to use the PS2 VU1 over 5% efficiency but did it ever happen?

 

[RedBlackDevil]

And Pakpassion/Griffith/Xbot/RedBlackDevil just how many more accounts do you have on this forum ?

I really think that bounding my nick to others, is well deserved a BAN
you are a very incorrect and ineducated person, you came in a civil discussion just to dearil it and start a flame.
I just report you reply to mods

maybe this is your way to do, considering that you seems to know a lot of nick here, but you have only 4 post.

 

[RedBlackDevil]

Now, if you want to change your phrasing and say 'SPE can't run general purpose code quickly enough to match a conventional CPU' just go ahead and say so. That's a very different thing to 'is only a Single Precision Floating Point unit' as you first argued. It would also show a degree of intelligence if when corrected on points like 'SPE's being unable to access memory without going through PPE', you acknowlede the correction.

so after a lot of explainations and posts, you came to the start misunderstanding all the discussion?

have I to write in the stone that a SPE can't do this in the real world after I've repeated over and over?
truly seems to me that you are trying to be the smartest in a word-fight, what are you trying to demo, saying that on a SPE and on a 8086 you can code ANY thing, if this is impossibile to do in practice?

and the SPE IS a heavly geared single precision floating point unit, if you like it or not, this don't change absolutely nothing, this is a fact.

 

[Robert.L]

Maybe this is your way to do, considering that you seems to know a lot of nick here, but you have only 4 post.

Maybe because I have been following this forum for a long time

Everything's 'possible', but it's pretty meaningless without knowing how much work is required to make it happen. I'm sure it was 'possible' to use the PS2 VU1 over 5% efficiency but did it ever happen?

You sure you don’t mean VU0

and the SPE IS a heavly geared single precision floating point unit, if you like it or not, this don't change absolutely nothing, this is a fact.

What ? spe’s can do integers just as good as they can do floats

 

[RedBlackDevil]

Maybe because I have been following this forum for a long time

of course I'm jumping in the believer train, good
just shut up derailing and limit yourself to talk about the topic, and all will be fine

[quote[
What ? spe’s can do integers just as good as they can do floats[/QUOTE]

"First, and most obvious, is the fact that the Cell SPE is geared for single-precision SIMD computation. Most of its arithmetic instructions operate on 128-bit vectors of four 32-bit elements. So the execution core is packed with vector ALUs, instead of the traditional fixed-point ALUs."

From "Introducing the IBM/Sony/Toshiba Cell Processor — Part I: the SIMD processing units"
http://arstechnica.com/articles/paedia/cpu/cell-1.ars/2

 

[RedBlackDevil]

Maybe because I have been following this forum for a long time

of course I'm jumping in the believer train, good
just shut up derailing and attacking, limit yourself to talk about the topic, and all will be fine

[quote[
What ? spe’s can do integers just as good as they can do floats[/QUOTE]

"First, and most obvious, is the fact that the Cell SPE is geared for single-precision SIMD computation. Most of its arithmetic instructions operate on 128-bit vectors of four 32-bit elements. So the execution core is packed with vector ALUs, instead of the traditional fixed-point ALUs."

From "Introducing the IBM/Sony/Toshiba Cell Processor — Part I: the SIMD processing units"
http://arstechnica.com/articles/paedia/cpu/cell-1.ars/2

 

[RedBlackDevil]

sorry for duplicated headers, my 24Mbit connection is broken
I apologize.

 

[Sousuke]

"First, and most obvious, is the fact that the Cell SPE is geared for single-precision SIMD computation. Most of its arithmetic instructions operate on 128-bit vectors of four 32-bit elements. So the execution core is packed with vector ALUs, instead of the traditional fixed-point ALUs."

From "Introducing the IBM/Sony/Toshiba Cell Processor — Part I: the SIMD processing units"
http://arstechnica.com/articles/paedia/cpu/cell-1.ars/2

So where does it say that an SPE cannot do integers just as good as they can do floats?

 

[RedBlackDevil]

So where does it say that an SPE cannot do integers just as good as they can do floats?

so where you read that SPE can do integers just as good as they can do floats?

from what I remember, in double precision and integer, spe have an huge performance hit, if you can proof otherwise, just put some links please

any doubt that the spe is a geared SP FP unit?

 

[add n to (x)]

so where you read that SPE can do integers just as good as they can do floats?

from what I remember, in double precision and integer, spe have an huge performance hit, if you can proof otherwise, just put some links please

any doubt that the spe is a geared SP FP unit?

Wow, you guys have actually made me want to post something

This article has a good overview of the Cell architecture, as well as details of both the PPE & SPE pipelines:

http://www.research.ibm.com/journal/rd/494/kahle.pdf

As you can see in figure 3, load/store & FP instructions are 6 cycle latency, permutes are 4 cycles and fixed point (aka integer) are 2 cycles. This doesn't mean that it can do more integer than FP (since both are fully pipelined and have single cycle throughput), but it does mean that you get your results back a lot quicker and the compiler can potentially generate better code. So yes, the SPEs are just as good for integer math as floating point.

 

[makaveli87]

so where you read that SPE can do integers just as good as they can do floats?

http://www-128.ibm.com/developerworks/power/library/pa-cellperf/

scroll down to figure 3
" The SPUs SIMD support can perform operations on sixteen 8-bit integers, eight 16-bit integers, four 32-bit integers, or four single-precision floating-point numbers per cycle. At 3.2GHz, each SPU is capable of performing up to 51.2 billion 8-bit integer operations or 25.6GFLOPs in single precision"

also

http://www.casesconference.org/cases2005/pdf/Cell-tutorial.pdf

Page 32 SPE latencies

 

[Crossbar]

so where you read that SPE can do integers just as good as they can do floats?

from what I remember, in double precision and integer, spe have an huge performance hit, if you can proof otherwise, just put some links please

any doubt that the spe is a geared SP FP unit?

Here's another good link to start with:
The SPE instruction set architecture
http://www-306.ibm.com/chips/techlib/techlib.nsf/techdocs/76CA6C7304210F3987257060006F2C44

I suggest you download it, make a printout and read through it twice in a calm environment before you continue to clog up this thread with angry missinformed posts.

 

[Sousuke]

Thanks Crossbar, thats the link I wanted to add in my last post already, but didn't find it