http://www.x86watch.com/news/amd-barcelona-bleak-152.html
What is the cause for this so slow ramp of 65 nm? It seems the same is happening to NVIDIA. Why is like this? AMD didn't even try requesting 65nm for their GPUs, they went to 55nm.
There could be a number of reasons AMD won't disclose.
K10, for example, is a rehash of K8, which was a rehash of K7.
The designs scaled well at 180nm, 130nm (after a few revisions), and eventually to AMD's best ever clocks at 90nm.
The last time an optical shrink was a good bet for circuit performance improvement for an otherwise unchanged design was 130nm to 90nm.
One possibility is that AMD's failure to bring about a clean-sheet design below 90nm meant forcing K8 too far.
Another possibility is that AMD's particular process improvements have lead to manufacturing issues, especially on a design that has not changed enough to account for increased problems with variability.
I can see that AMD is almost skiping 65nm node generation, for their top products . AMD is rushing 45nm, and the ramp up is scheduled for the middle of next year. What is the reason for these problems with 65 nm node?
And yet the tool manufacturers for the needed equipment don't expect to sell AMD the necessary equipment in time for such an early 45nm ramp.
Chartered, AMD's partner, said it expects to start ramping on 45nm shortly after AMD. Chartered is planning to ramp in 2009.
1.The physics process is inherently screwed for this node.
If it's screwed at 65nm, it is no better at 45nm and below.
The issue is whether AMD's design and manufacturing methods have adapted.
They obviously have not yet with Barcelona.
The question is whether AMD can afford to put more R&D funds into making Barcelona manufacturable at the expense of Shanghai and especially Bulldozer.
2. AMD is heavily refurbishing for 45 nm and 32 nm, and keeping 65nm at a rediculous minimum. The issue with NVIDIA is just a coincidence.
I hope the 2nd is the truth.
I doubt it's a coincidence that a lot of semiconductor companies are bailing out of running in-house fabs after the 65nm node.
Though TSMC's issues, if any, would not necessarily be the same as AMD's.
If AMD is writing off 65nm, then selling fab 38 makes more sense, because there's little point in converting the fab to a bad process node, and the complete failure of a produt cycle to pay off R&D would leave AMD in a desperate situation.
Of course, selling off a fab just leaves AMD's position more precarious.
Even if its fortunes improve, it will be capacity limited.
Those OEMs that aren't already looking elsewhere will lose whatever faith AMD has garnered over the last few years.
AMD's output will be an even smaller fraction of Intel's, and it may be impossible to expand market share if it becomes physically impossible to produce enough chips.
This points to uncertainty this thread has given me about the fate of AMD and Intel's cross-licensing agreement.
The shrinking capacity, just as the high-volume Fusion comes out, is around the same time this agreemend expires.
AMD is going to need capacity for that.
On top of that, Bulldozer is giving up on SSE4 compatibility, at least for the first variants.
SSE5 is AMD's own fork, and HPC floating point is apparently a strong focus in AMD's Bulldozer presentation.
This leaves the markets K8 and K10 targeted in the wind, where current and near-current compatibility with Intel x86 is a key factor.
Will AMD make Fusion non-compatible with contemporary Intel x86 to allow outside fabs to manufacture it?
It would allow AMD to focus its limited capacity more tightly where compatibility would be necessary.
