An theoretical increase by X% in efficiency of a newer architecture doesn't also necessarily mean an increase by the same persentage now does it?
Well no, hence why I put "may be even more for realistic workloads". A15's unified pipe and improved NEON/VFP pipeline alone will mean vast improvements for anything floating-point related.
Furthermore, a theoretical increase in X% IPC has correlated far more with improved end-performance than a theoretical increase in core scaling. Few applications scale anywhere near linearly with core count and most see no improvement at all going from 2 cores to 4 (or hell, going from 1 core to 2).
This isn't the case for IPC improvements.
Furthermore, DMIPS/MHz when measuring IPC isn't a purely "theoretical increase" either. It may be overly optimistic but it's nowhere near as "theoretical" as saying 2xCores = 2xPerformance.
If we were to speak in terms of purely theoretical improvements, A15 would be 50% faster clock-for-clock than A9; assuming it were fetch limited. Or 100% faster clock-for-clock in the case of NEON instructions. Or 100% faster clock-for-clock in the case of dispatch-limited.
So, in conclusion, A15 will be faster -- likely significantly so -- clock-for-clock than A9. And like I said, under ~99% of applications out there, 2xA15 will likely outperform 4xA9 and by quite a significant degree.
If everything goes according to plans Tegra3 might be shipping somewhat this year and in way larger volumes beginning of 2012. When are the first dual A15 powered SoCs slated to appear in devices again? Most likely end of 2012 if not slightly later and that from ARM's A15 lead partners.
While true, Krait will be shipping end of this year with devices likely early 2012.
Wouldn't it tell you that A15 isn't possible to be integrated before ARM's A15 lead partners will? So what would NV integrate in a Tegra3 since it's not a A15 lead partner yet still wants to stay on the CPU execution forefront? No other choice than quad A9; considering that in the meantime most others most likely will still be fiddling around with dual A9 they're well positioned on the CPU front at least.
While true, I was merely pointing out that your statement of 4xA9 being somewhat equal to 2xA15 to be absolutely false in the vast vast vast majority of circumstances.
I agree that for the time-frame that nVidia is aiming at, A9's are still the best option. I will disagree that the extra area and power at 40nm of having 4xA9 with NEON is worth any marginal gain in performance from the tiny fraction of applications that may scale to 4 threads. They would've been better off using that resource to beef up the GPU or add a pair of lower-power CPU's in a heterogeneous configuration.