Tegra 3 officially announced; in tablets by August, smartphones by Christmas

It should be obvious that they measured T3 FP performance with 4x NEONs versus T2 without it

So acording to nvidia Core 2 Duo FP performance is something over two times more than Tegra2 ?

Here are some funy results of the soc-s. 37 Mflops :rolleyes:.

35330.png
 
... But I don't really get the appeal of playing videos at that resolution in the first place, and I especially don't agree with the laptopmag writer that 2560x1600 is a resolution you'll want on mobile devices. But I don't consider tablets mobile devices, maybe he does. It's a useful resolution in general, but I find > 1080p to be vastly overkill, and it isn't going to matter in 2012 if no one is releasing movies at that bit-rate. It isn't worth the bandwidth or storage space.

~300 DPI tablets, daisy-chained external DisplayPort monitors, and 3D. those are three reasons why pushing what seem today like absurdly high dot clocks out of mobile parts will be an everyday expectation in two, three years.

DisplayPort's throughput is 17.28 GB/s, and most of that is intended for video. someone's gotta feed it.
 
That coremark is highly suspect:

DSC_1401.jpg


-> GCC 3.4.4 May 18, 2005
-> GCC 4.4.1 July 22, 2009
C2D was released in 2006
O2 - optimizations that decrease size without affecting speed and increase size without decreasing speed
O3 - O2 optimizations plus (essentially) anything that will increase speed
 
~300 DPI tablets, daisy-chained external DisplayPort monitors, and 3D. those are three reasons why pushing what seem today like absurdly high dot clocks out of mobile parts will be an everyday expectation in two, three years.

DisplayPort's throughput is 17.28 GB/s, and most of that is intended for video. someone's gotta feed it.

I get the resolutions. I don't get the demand for source video at those resolutions. It just isn't going to happen, no one will be releasing movies at that resolution and I doubt there'll be a lot of consumer cameras at that resolution either, much less the ones on your phone. Look how long it took for Bluray to really catch on, and it still hasn't displaced DVD. Without anything coming out at 1440p (much less the insane 2160p) there'll be nothing to play. It's just going to be for bragging rights.
 
That coremark is highly suspect:

-> GCC 3.4.4 May 18, 2005
-> GCC 4.4.1 July 22, 2009
C2D was released in 2006
O2 - optimizations that decrease size without affecting speed and increase size without decreasing speed
O3 - O2 optimizations plus (essentially) anything that will increase speed

Nice catch.
 
That coremark is highly suspect:

DSC_1401.jpg


-> GCC 3.4.4 May 18, 2005
-> GCC 4.4.1 July 22, 2009
C2D was released in 2006
O2 - optimizations that decrease size without affecting speed and increase size without decreasing speed
O3 - O2 optimizations plus (essentially) anything that will increase speed

good catch. Lots of compiler shenanigans in there.
 
There are no hot-clocked ALUs in Tegra GPUs (yet) and T3 doesn't sound like it either.

Are you sure? With a 5x performance bump and 12 shaders (unified or not) compared to T2's 8 shaders (4ps+4vs), it seems to me there's a pretty good chance the T3's shaders are hot-clocked. It's that or the whole GPU is clocked a lot faster than 300MHz.

That or it's a completely new architecture, apart from the old APX2500.. Something closer to G98 arch without DX10 compliance?

Even if the market-BS 5x previous model performance translates into 2.5x real performance bump, increasing the ALUs by 50% would never be enough to hold that advantage. Unless nVidia has gone the Vivante way and has the whole Tegra 3 GPU clocked at ~900MHz.


I myself am confused since I thought T2 has 2 Vec4 PS ALUs but judging from what Anand is repeating over and over again (4 ps + 4 vs and 4 MADDs from each) it's more like 8 FLOPs out of the FP20 PS ALUs * 0.24GHz = 1.92 GFLOPs/s. If those should be 2 Vec4 PS ALUs after all it's 3.84 GFLOPs.
Anand is just using the numbers presented in nVidia's own slides.
 
That coremark is highly suspect:

DSC_1401.jpg


-> GCC 3.4.4 May 18, 2005
-> GCC 4.4.1 July 22, 2009
C2D was released in 2006
O2 - optimizations that decrease size without affecting speed and increase size without decreasing speed
O3 - O2 optimizations plus (essentially) anything that will increase speed

Lol. Nice to see NV still playing games, takes me back to the cheating that went on when GF FX5xxx was up againt R300, oh what fun.

Given that the Intel competitor here is Atom you have to wonder why they didn't compare to that...
 
Their engineered win wouldn't look as impressive against a mere Atom, it's more impressive to be 12% faster than a Core2Duo.
 
Their engineered win wouldn't look as impressive against a mere Atom, it's more impressive to be 12% faster than a Core2Duo.

As well as the fact that the T7200 doesn't have hyperthreading leaving it with only 2 threads, whereas the dual core atoms do, allowing them to run 4 threads.
 
As well as the fact that the T7200 doesn't have hyperthreading leaving it with only 2 threads, whereas the dual core atoms do, allowing them to run 4 threads.

Also the fact that the T7200 is more than 4 years old now. Granted its no pushover but its based on the original Conroe core, runs at 2 ghz with 4 MB cache and 667 Mhz FSB. The latest Penryn based C2D's can go up to 3 Ghz with 6 MB cache and a 1066 mhz bus
 
Sorry but that one made me spray my coffee all over the desk. Try a fraction of a ION IGP with less capabilities and you'll be there.

I'm sorry, i wasn't aware of any Tegra real numbers.. I assumed that the 8 cores where similar to the desktop architecture.

GPU_575px.jpg


So it's 1.92 Gigaflops.

http://www.engadget.com/2011/01/24/nvidia-tegra-3-equipped-with-1-5ghz-quad-core-madness-teased-b/

The performance chart is related to the entire SoC, not just the GPU part as i was thinking in the beginning. The 5x performance comes from 3x times the graphic power and 2.5x twice the cpu power.

So Kal-El has 4 Cortex A9-core and it's 40nm (right?)
Wayne may have 4 Cortex A15-cores and it's on 28nm.
From the time frame, i think Logan and Stark are on 20nm.. and probably based on ARMv8 architecture.
 
Given that the Intel competitor here is Atom you have to wonder why they didn't compare to that...
Because Atom is really poor at Coremark and that would have looked even more dubious :LOL:

Cortex-A9 does about 2.9 CoreMark / Mhz / core, while Atom is about 1.8 without HT and 2.8 with (based on this).

Out of curiosity I tested CoreMark on my i7 920 using -O2 with gcc 3.4.6 and gcc 4.4.4. In 32-bit mode gcc 3.4.6 give 6308 while gcc 4.4.4 gives 7135 (I won't do the division to get CM/Mhz given that Turbo is enabled and probably kicked in). The difference is big enough to change the ordering in nVidia results :)

Anyway CoreMark is not very interesting IMHO. What's the point of testing 16-bit multiplications? Why such a poor implementation of CRC? And what about benchmarks that fully fit in L1?
 
I don't see how they got anything up and running for demonstration in 12 days. They said that they were sampling in December, wouldn't that mean they've had at least a couple months?
I don't see what's strange about getting a demo running in 12 days. If a PC chip is good you can boot Windows on day 1 and maybe even run 3d mark or something like that. A lot of bugs are the corner cases found in the days that follow.
 
I don't see what's strange about getting a demo running in 12 days. If a PC chip is good you can boot Windows on day 1 and maybe even run 3d mark or something like that. A lot of bugs are the corner cases found in the days that follow.

I'm not disputing that they got first silicon in a demo in 12 days (although it'd be a little surprising), I'm just saying that I don't see why they couldn't have had a lot longer and don't know where this 12 day figure is coming from.
 
From experience, the PR for "sampling" usually means they've released GDS to fab. Getting it back from fab is the actual day for starting the demo work.
 
Really? That sounds pretty farcical. "Sampling" should mean that you've actually sent samples outside the company. I'd expect it to be a step beyond having internally received first silicon.
 
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