The top value seems to fit with the chart Samsung gave:
http://www.anandtech.com/show/6768/samsung-details-exynos-5-octa-architecture-power-at-isscc-13 Following the values down as being per-cluster instead of per-core at least gives a smooth curve, if a very steeply dropping one. Having such a large expense for L2 seems odd when considering how low the leakage has to be here (unless higher clock speeds have much worse leakage due to the reverse body biasing), I expect a good chunk of the L2 cache power consumption to be static since most of the SRAM cells won't be accessed most of the time.
It's hard to tell since they use DMIPS (ugh..) instead of MHz, but if we go by ARM's 3.5DMIPS/MHz that gives a top value there of about 1.9-2GHz, for a power value of around 5.5W or 1.375W/core. Note that Samsung also used 3.5DMIPS/MHz and 2GHz figures for Exynos 5250 here:
http://www.samsung.com/global/business/semiconductor/minisite/Exynos/news_11.html
1.86W @ 1.6GHz seems much higher than what would be suggested by the graph. It's also rather striking that the phone would be putting out over 8W, even 9W under the full CPU load you'd experience in benchmarks. Mind you, there do appear to be reports that it gets very hot (
http://www.nextpowerup.com/news/1236/samsung-galaxy-s4-overheats-new-benchmarks-surface.html) but so did Galaxy S2 while putting out much less heat.
The other datapoint is in Anand's power measurements of Exynos 5250 (
http://www.anandtech.com/show/6536/arm-vs-x86-the-real-showdown/13) he remarks that the throttling makes it drop down to 800MHz; both cores are still fully active but the CPU power consumption is not even 415mW. So unless the frequency was really lower or the throttling also involved an uneven clock cadence (going in and out of clock gating for some big chunks of time) then it suggests around 208mW per core at 800MHz. That makes 387mW @ 800MHz for Exynos 5410 seem awfully high (considering improvements in process and possible enhancements to the design). 96.75mW/core would seem quite low, but maybe not if the power measurements contain L2 cache and the graph values don't.