RV380 and R420 info @ xbit
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Nebuchadnezzar
Legend
My head hurts now 
DegustatoR
Legend
400?rwolf said:
IMO R360 / RV360 are ficticous.
"RV360" definately so - why would the do a respin when they are yeilding at 98% for 400MHz and could easily start binning them for 450-500MHz operation? No point. All they need to do is bung a part out in the 450-500MHz core range and with 350-400MHz RAM and there is a damned good speed boost, that would likely put NV31 MK2 under some pressure.
Unless...
there was a comments that "some features may be enabled" in Rv360. there is a large disparity between the quoted transistor count for Rv350 and what we've heard for M10. There may be a possability that the HierZ is onchip in RV350, but not enabled (perhaps its was a little dodgy and limited the clock speeds). A respin may not be to increase clock speeds but to fix the HeirZ.
Regardless, IMO R360 and RV360 are still not correct as far as being "new tape-outs", but respins of R350 and RV350.
"RV360" definately so - why would the do a respin when they are yeilding at 98% for 400MHz and could easily start binning them for 450-500MHz operation? No point. All they need to do is bung a part out in the 450-500MHz core range and with 350-400MHz RAM and there is a damned good speed boost, that would likely put NV31 MK2 under some pressure.
Unless...
there was a comments that "some features may be enabled" in Rv360. there is a large disparity between the quoted transistor count for Rv350 and what we've heard for M10. There may be a possability that the HierZ is onchip in RV350, but not enabled (perhaps its was a little dodgy and limited the clock speeds). A respin may not be to increase clock speeds but to fix the HeirZ.
Regardless, IMO R360 and RV360 are still not correct as far as being "new tape-outs", but respins of R350 and RV350.
DaveBaumann said:
Did god give them some type of super power? Did TSMC give them fabs fifty billion times better than to nVidia?
Or does god simply hate nVidia?
With that type of yields, you may begin to wonder if ATI isn't fully on track for a financial boom...
I doubt R360/RV360 are "fictious". As you said, HierZ is possible for RV360. And I've seen someone stating the R360 as "Performance Optimized", but his post was deleted in like 15 minutes. Posting things on GPU:RW sure makes info go away rather quickly
And anyway, we're getting even more confirmations of both being respins ( I'm not talking about only currently public stuff here ) - they definitively are respins. As to whether ATI might have modified something minor which was bugged in the original silicon, for example, I don't know.
Uttar
Uttar
I think Dave is talking about bin splits and that he thinks 98% of all working chips are binning at 400MhzUttar said:
Did god give them some type of super power? Did TSMC give them fabs fifty billion times better than to nVidia?
Or does god simply hate nVidia?
With that type of yields, you may begin to wonder if ATI isn't fully on track for a financial boom...
No, They are not binning at all (AFAIK). i.e. the chips you see in the non-pro 9600's are the same as those in the 9600 PRO and could very well clock as high.
98% total yield is insane. 90% is believable, 98% not.
Uttar, can't you just admit that ATI has done .13 right? By not pushing the technology to the highest degree, they have been able to get great yeilds. This just points out that one (of many!) nVidia's major mistakes was trying to push the technology before it was ready - even TSMC told them this!
DaveBaumann said:
Ratchet @ rage3d tested the 9600 pro and non pro. How is this for an overclock.
"The 9600 overclock was even more impressive than that. Admittedly, I didn't hold much enthusiasm for the low-rated TSOP memory, but at least it manage to struggle its way up to its rated 250MHz. My final overclock on the core? An amazing 450MHz using nothing but the stock ... fanless ... heatsink. That's an impressive 125MHz over stock for those of you that failed math class (or skipped past the specs page). Stunned? Me too. It's just too bad the memory can't keep up, otherwise we'd have one damn fine bargain on our hands. Here are the results for this overclock:"
http://www.rage3d.com/reviews/sapphire/sapphire9600s/?page=1
Either that or simply a PCI Express version of the RV360. . . It'd make sense, after all, for ATI to have both versions of their cards while PCI Express makes its way to becoming standard on motherboards. Of course, it also makes sense to only offer PCI Express versions of a single card in order to help force the bus' adoption.MuFu said:
Ostsol said:
I could see ATI placing their super high end $500 256MB version of the R420 as PCI-Express only, and have the mainstream and value cards as AGP/PCI-Express.
Would make sense since mainly gamers will upgrade so soon after PCI-Express is introduced in the desktop sector 1H'04 with Grantsdale.
asicnewbie
Newcomer
> Is this the same .13um process TSMC and nvidia had problems with on the NV30?
I doubt it. Foundries offer different 'logic' product-lines at a given tech-node (.13, .15, .18, etc.) At 0.13u, TSMC offers 'general', 'high-speed', 'mixed-signal', and 'low-power' logic families. (This is all marketing info from tsmc.com's website.) I think we can rule out the desktop-GPU using the 'low-power' process, but that still leaves three choices. One could argue that the various 'logic' product-families at one foundry, at the same tech-node, differ superficially. But there is other stuff to worry about.
In addition to picking a logic-family, the customer can specify the #metal (interconnect) layers, choice of dielectric (FSG or low-K), and several other process-options (like the extra steps for e-DRAM or embedded-flash.) From a manufacturing standpoint, these factors are secondary considerations to the primary choice (of logic-family) but each influences manufacturing yield. For example, more metal layers = more processing steps = lower yield (slightly.) A heavily-loaded e-DRAM design will suffer more faults than a purely 'random-logic' design (by alot, because the e-DRAM is more vulnerable to process defects.)
And finally, just about all foundries (TSMC included) have documentation and canned-apps to help customers calculate yield-estimates. Unfortunately, these goodies tend to be part of the foundry's design library, all locked under an NDA (non-disclosure agreement.) As a matter of fact, UMC's die-estimator is web-based (accesible straight from their main page www.umc.com), but it requires posession of an active customer account.
If someone could kindly punch in the RV350's die-size and other design characteristics (# RAMS, metal-layers, 200mm vs 300mm wafer, etc.) into a calculator, we would find out if a 98% yield is a realistically achievable event, or 'full planetary alignment' event.
Or if you're a masochist like my coworker, you can manually crunch through the foundry process documentation, and create your own Excel spreadsheet.
I doubt it. Foundries offer different 'logic' product-lines at a given tech-node (.13, .15, .18, etc.) At 0.13u, TSMC offers 'general', 'high-speed', 'mixed-signal', and 'low-power' logic families. (This is all marketing info from tsmc.com's website.) I think we can rule out the desktop-GPU using the 'low-power' process, but that still leaves three choices. One could argue that the various 'logic' product-families at one foundry, at the same tech-node, differ superficially. But there is other stuff to worry about.
In addition to picking a logic-family, the customer can specify the #metal (interconnect) layers, choice of dielectric (FSG or low-K), and several other process-options (like the extra steps for e-DRAM or embedded-flash.) From a manufacturing standpoint, these factors are secondary considerations to the primary choice (of logic-family) but each influences manufacturing yield. For example, more metal layers = more processing steps = lower yield (slightly.) A heavily-loaded e-DRAM design will suffer more faults than a purely 'random-logic' design (by alot, because the e-DRAM is more vulnerable to process defects.)
And finally, just about all foundries (TSMC included) have documentation and canned-apps to help customers calculate yield-estimates. Unfortunately, these goodies tend to be part of the foundry's design library, all locked under an NDA (non-disclosure agreement.) As a matter of fact, UMC's die-estimator is web-based (accesible straight from their main page www.umc.com), but it requires posession of an active customer account.
If someone could kindly punch in the RV350's die-size and other design characteristics (# RAMS, metal-layers, 200mm vs 300mm wafer, etc.) into a calculator, we would find out if a 98% yield is a realistically achievable event, or 'full planetary alignment' event.
Or if you're a masochist like my coworker, you can manually crunch through the foundry process documentation, and create your own Excel spreadsheet.