*rename* What tasks might be offloaded to the gpu in the future?

[Shifty Geezer]

I'm confused! How'd we get 227% utilization? What does that number represent? Are these job percentages total Cell SPU time or per-SPU time. That is, Gfx.Scene.Portals used 30% of one SPUs time, or 30% of the SPU is spent on this task. 30% of a frame is spent on the task?? If per SPU, there'd be '600%' available. This would tie in with GG's comments that they don't use more than 60% or whatever.

Having not seen the vid yet, I'm probably missing a lot of context!

 

[TimothyFarrar]

I believe the context behind the 227% business is that in this scene (the train scene with a debug window up) they only needed a little over 2 SPUs to do all the work. With other scenes and multiplayer they end up pushing all the SPUs. So percent should be in the context of 100% = one SPU.

 

[Neb]

I believe the context behind the 227% business is that in this scene (the train scene with a debug window up) they only needed a little over 2 SPUs to do all the work. With other scenes and multiplayer they end up pushing all the SPUs. So percent should be in the context of 100% = one SPU.

Maybe this supports your belief?

PRIMS / TRI
-----------
Totals ..... 1431/ ... 344,634

I take it it means triangels and thats a quite low number of polygons considering GG claim of ~1m/polygons frame.

 

[TimothyFarrar]

I take it it means triangels and thats a quite low number of polygons considering GG claim of ~1m/polygons frame.

OT, but no doubt the scene, the train scene, with the surrounding debug info where I attempted to extract those numbers, was one of the relatively lower poly areas. Also the video mentions that they were only effectively using 2 SPUs in that scene.

 

[Nano]

Wouldn't CPU without vector units be lacking in regard to compression/decompression power?
If next gen is about off load bunch of things to a potent gpgpu and cpu is left with remain serial/branchy tasks wouldn't it be better to have 1/2 relativelay fast CPU cores sharing the same amount of cache two or four cores would have?

Wouldn't it be the best solution to have a single chip to ensure fast cpu/gpu communication?

If I was designing h/w, I would aim for the future tech to have the CPU & GPU in the same physical package to help cost/bandwidth and such.

But I think the roles of each chip should be largely defined. Rather than offloading things to the GPU, I believe our future CPUs should have considerably more vector processing power to do those type of jobs better, as well as offer extra support to the GPU (seeing as graphics computational demand is still higher) when free vector processors are available.

A cell-like model, except a lot more branch prediction hardware and such please

 

[fehu]

So if I undestand, the ideal (cost/power) 2011 system is composed of a good eterogeneous cpu strong on the vector instruction type, with many core, but not more than eight, and a very very powerful fat gpu?

 

[Nano]

Certainly fits my mindset.