Read please, an interesting mail that about N5 and Hitachi

Except, it's integer. Except, it's 8-bit. Except, it's USELESS as a gaming device, and hence don't beat EE at all. EE will PULVERIZE that thing in a real-world gaming situation, emulating fp is dead slow with integer, and emulating higher bit ranges than what the chip's got in hardware makes it slower still.

Huh???? The cpu that was used in NEC's old SX-4 supercomputers were vector processors and came out LONG before the EE and still bitch slaps the EE at floating point math. :LOL: :oops:

Like said before: lemme know when media says NEC is making a single-chip 1Tflop CPU, until then you better pipe down coz you sound like a g-d f*nboy. Wether they COULD and wether they actually ARE are still two entirely different things. We're not interested in what a company CAN do, but what they actually ARE doing.

Umm..and like I said before, nobody is saying NEC is making a 1 TFLOPS cpu, but if Nintendo offers the right price... ;)


1: Stop putting words in my mouth, you sound like a f*nboy when you do that. Nobody's saying anything like that! 2: You're not seriously suggesting Cell only exists as a patent? If so, why are they building silicon fabs to manufacture the thing, wouldn't printing presses be more suitable for the Oita #2 building, not to mention much cheaper?

Get it through your head man...the patent says 1 TFLOPS and I say CELL in PS3 won't be hitting 1 TFLOPS. I don't need to prove it either. It's my guess so get over it.



Yes I read, but do you even understand? You have a concept that isn't anything like what can be used in a games console! A massive SIMD array for 128-bit FP is massively more dense in transistors compared to your concept. They aren't *anything* alike! It's not just a matter of, oh we'll just make it 16x wider and 20x faster and make it do FP instead of INT, it's a question of TOTAL FROM THE GROUND-UP REDESIGN here!

Um no...CELL is from the ground up..doesn't mean other designs can't borrow from an existing concept that uses a massive array of SIMD units that has already been proven.

Do you get it? They'd be NOTHING alike! Your "concept" isn't worth the silicon it's lithographed on when it comes as a concept for a games console CPU. You're comparing a two-stroke motorcycle motor to an afterburning turbofan engine. They got nothing in common other than propelling things forwards, and one is certainly NOT proof of concept for the other.

Stop bringing up your stupid BS analogies man. A motorcycle motor vs a turbofan??? LOL get off the pipe man. You're already knee deep in BS. More like NA vs FI.


Well, PS2 vector units run game code. They occupy at minimum on the order of many hundreds of thousands of transistors.

Duh, I'm asking which part of the VU specifically, the FDIV, FMACS, what???


DUH! Because EE's designed for streaming data through it!

EXACTLY!!! So why does a cpu from someone else need more than 1MB of cache??? Oh I know because SONY has magical technology that nobody has right???


Your f*nboyish tendencies shine through again, where did I say it cost $10 at launch or even now? Entire console cost was a few hundred $ on the CONSUMER end, stores bought them for less still of course, no matter what the chip cost Sony to manufacture initially.

They knew of course they weren't just going to manufacture a few tens of thousands of chips, so what they took on the chin initially they started making back quite a while ago.

Can you find a single-chip CPU, or indeed a whole computer system that gave you more float performance for less money than EE/PS2?

Uhh..stop dodging and answer the damn question. How much did EE cost to manufacture at launch???
 
Excuse me to ask this, but : what's the point, please ?

Let's admit that Cell will destroy whatever CPU that could/will be in N5 or in Xbox2. Do you mean that PS3 will outclass largely its competitors from a global point of view ?

I think this debate is no interest because from a "flop" point of view, EE is more powerful than the CPUs that are in Xbox or GCN. Does it make this CPU globally more powerfull ? Does it make PS2 more powerfull than the other two ?

There have a lot of noise/hype around PS2 (remember "third world"). GCN came out more discretly and even, i would easily agree that PS2 can push more polys than GCN but my point is : do i see more polished games on GCN from a graphical point of view ? (without speaking about Xbox ...)

IMO .... definitly, yes !

A lot have been promised about PS3 and nothing is known about Xbox2 and N5 but there is a thing everybody should be sure : PS3 won't outclass the competition globally !

The one who is saying such a thing is simply ...
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trolling ...
 
however if CELL is capable of 1 TFLOPS then a company like NEC or Hitachi can also have a cpu just as capable based on the fact that STI doesn't have some magical technology.

Well, Toshiba is Japan's 1st semiconductor player, their manufacturing process ( CMOS5 developed together with SCE ) allows them to fit ~36 % more memory cells ( SRAM and E-DRAM ) than NEC's 65 nm process, SCE has been a rising player in the semiconductor industry and IBM is a giant in the semiconductor field worldwide.

NEC is a very good company and sometimes smaller companies do outsmart bigger ones ( see IMG Tech and the PVR2 CLX chip compared to other GPUs of its time... if they only had the same GPU in the PC side as they did on the Dreamcast [well with the 2D stuff added] :( ), but the way you are putting it would be like saying that Intel's circuit designers could not outdo nVIDIA or ATI's ones: call it magic or call it talent or just call it HIGH R&D budget and lots of bright minds working on such a large scale project.

I doubt that NEC 8 GFLOPS CPU could have nicely fit a 1999 console in terms of price: What magic did SCE and Toshiba pulled off to make the EE cheaper ?

Well, I will let you in one of the secrets: it is rated at 6.2 GFLOPS and not 8 GFLOPS :p

The VUs do have local SRAM ( micro-memories ): the VU1, the major 3D workhorse, has 32 KB of micro-memory attached to it and a neat register file.

The VUs also benefit froma very fast EE's bus and a fast main RAM (and still they should have added an L2 cache for the EE, it would have helped the R5900 core a lot ).

The reason CELL needs more Local Storage, more Registers and e-DRAM is that the FP and Integer performance is rising so much that even not yet released memory technologes like RAMBUS very promising XDR would not be fast enough to keep the chip well fed ( they expect to have 25.6 GB/s for 2005 devices, I doubt that they will push for 51.2 GB/s ): the bottleneck that is rappresented by off-chip memory performance is becoming worse and worse.
 
It's all about the number of units you produce. The 8 GFLOP famous CPU could have been as cheap as the EE if it had been moved to mass production.
If I start a company and made my own i386 CPUs probably my production cost will be higher than the ones for a EE, CELL or a simple P3. Just because I won't produce a lot and I won't sell a single unit.
 
It all depends on the manufacturing process available and thermal requirements you ahve for your Hardware.

It is like taking the R300 or NV30 and saying, well with a 250 nm manufacturing process they would be very big, but if we manufacture them in high enough volume the cost will soread out very well.

First: do you have buyers for THAT kind of volume ?

Second: can you produce THAT volume of chips ? Witha chip that big you would not have very good initial yelds and unless you move to big wafers you will get few chips out of every wafer.

Third: if that chip "were" now dissipationg 150+ Watts would it still be very usable as GPU chip in your user' average PC ?
 
Well, Toshiba is Japan's 1st semiconductor player, their manufacturing process ( CMOS5 developed together with SCE ) allows them to fit ~36 % more memory cells ( SRAM and E-DRAM ) than NEC's 65 nm process, SCE has been a rising player in the semiconductor industry and IBM is a giant in the semiconductor field worldwide.

That's true but what I was proposing is a cpu with say 1-2 MB of L2 cache instead of 32-64MB of eDRAM. In that situation you wouldn't need Toshiba's memory cell size advantage because you would only need to fit 1-2MB anyway. For example Intel's new Dothan will have 2 MB of cache.
 
PC-Engine said:
DUH! Because EE's designed for streaming data through it!

EXACTLY!!! So why does a cpu from someone else need more than 1MB of cache??? Oh I know because SONY has magical technology that nobody has right???

Uhh, no- because they are following a "little pipe/big tank" style architecture. You need a big local cache if your memory is too slow and memory bus is too narrow for the type of dynamic processing you intend to do in a fast 3D game. Back in the day (1998, for example), you had off-the-shelf computer technologies consisting of 100 MHz DRAMs and 64-bit wide, 100 MHz front-side busses. If you used this, then you needed a sizable, local cache to approach the optimal performance of the host processor (assuming you had a chance to fit the app and data in there, at all). That is what "little pipe/big tank" is all about. When it comes to "dynamic applications", however, you will blow out that 1 MB local cache sooner or later. Then the CPU will slow down as it has to draw more data through that puny, puny memory bus. So ultimately it is really a dead-end, until local caches get MUCH larger (and I certainly don't mean just a few MB's in capacity).

The EE, at the time, was designed to follow a "big pipe/little tank" style architecture. The designers knew that the type of applications to be run on it would have streams of data continuously moving through the system all of the time- thus became the relevance of "streaming data". Having an L2 cache of finite size is somewhat pointless, because you couldn't put a large enough cache in there to do the job properly, anyway. So you have small caches to handle buffering, and you use those big pipes to continuously keep data moving around in the system. All of this requires a good deal of orchestration, but the benefits are considerable once you can finally move away from that "old school" little pipe/big tank paradigm.

Now when you see architectures featuring things like 64 MB of local cache, that will reinvigorate the notion of applications and data sitting local, running at near theoretical speeds on the local CPU(s) along with continued streaming of more data from fast main memory and big pipes...it will be a very intriguing advancement, IMO.
 
randycat99 said:
PC-Engine said:
DUH! Because EE's designed for streaming data through it!

EXACTLY!!! So why does a cpu from someone else need more than 1MB of cache??? Oh I know because SONY has magical technology that nobody has right???

Uhh, no- because they are following a "little pipe/big tank" style architecture. You need a big local cache if your memory is too slow and memory bus is too narrow for the type of dynamic processing you intend to do in a fast 3D game. Back in the day (1998, for example), you had off-the-shelf computer technologies consisting of 100 MHz DRAMs and 64-bit wide, 100 MHz front-side busses. If you used this, then you needed a sizable, local cache to approach the optimal performance of the host processor (assuming you had a chance to fit the app and data in there, at all). That is what "little pipe/big tank" is all about. When it comes to "dynamic applications", however, you will blow out that 1 MB local cache sooner or later. Then the CPU will slow down as it has to draw more data through that puny, puny memory bus. So ultimately it is really a dead-end, until local caches get MUCH larger (and I certainly don't mean just a few MB's in capacity).

The EE, at the time, was designed to follow a "big pipe/little tank" style architecture. The designers knew that the type of applications to be run on it would have streams of data continuously moving through the system all of the time- thus became the relevance of "streaming data". Having an L2 cache of finite size is somewhat pointless, because you couldn't put a large enough cache in there to do the job properly, anyway. So you have small caches to handle buffering, and you use those big pipes to continuously keep data moving around in the system. All of this requires a good deal of orchestration, but the benefits are considerable once you can finally move away from that "old school" little pipe/big tank paradigm.

Now when you see architectures featuring things like 64 MB of local cache, that will reinvigorate the notion of applications and data sitting local, running at near theoretical speeds on the local CPU(s) along with continued streaming of more data from fast main memory and big pipes...it will be a very intriguing advancement, IMO.

Well thank you for explaining but I'm already aware of the "little pipe/big tank" philosophy. What I was asking is if the EE was designed with very little cache yet it was still able to keep it's 9 FPUs fed, then why can't another manufacturer follow the same philosophy except instead of 9 FPUs, a tiny cache, and RDRAM, bump it up to maybe 128 FPUs and a 1-2MB cache and DDR3??? The way I see it you either have a huge cache with slow external memory or a small cache and very fast memory and all variations inbetween. I don't see where the problem is. As a matter of fact in another thread I brought up the fact that the Earth Simulator uses no cache whatsoever because the memory subsystem is so friggin fast therefore achieving a theoretical efficiency of nearly 90%. It's kinda like the GCN where the main memory consists of very low latency 1T-SRAM. Nintendo described it as a huge L3 cache ;)

I know CELL is using a slighty different approach, but I'm not comparing EE to CELL which has a lot of eDRAM. My point is CELL is not the only approach to a powerful cpu.
 
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