Well I'm not sure how those part were done, high bin parts?Energy efficient Athlon 2 x4's and Phenom 2's are still much better peforming chips and will use very little power.
Other than that Piledriver wins in many cases against Star core /K10/K10.5, not thanks to intrinsic better IPC but higher clock speed, better turbo mode, and support for new instructions.
Stream rollers should definitely let K10 behind in every multi-threading workload. sometime in 2013 though...
In my opinion CMT is doomed anyway, they are beating a dead horse. In some slides at last IDF they spoke about possible convergence between their low power and high power cores (after Excavators and the V2 of Jaguar cores). I hope they get rid of CMT at this time.
I'm a believer that a 3 cores that would include all the improvement and refinement AMD included in both BD and PD would still be a better performer than the two aforementioned products.
I also believe that temporarily AMD should have done what they did with GPU, go with tinier die size. ( I mean till their new architecture would have been ironed out).
AMD can't work on many chip concurrently that why we have usually one APU and salvage parts and the FX (4modules) and it salvages parts.
They should have made it that in the desktop realm, the only chip that sell is the APU.
The chip is too big, anything above ~190mm^2 seems to imply some production headache.
They should have make their mainstream desktop chip to fit within that constrain.
A 3 cores design with a way lesser GPU (Cayman class EDIT Caicos class oops) could have fit the bill as as many reviewer pointed out APUs are still searching for their audience, such GPU power is more than what casual care for and not enough for "occidental" gamers.
Taking in account AMD process disadvantage it could have been a great idea.
The part could have been a fair competitor for core i3 while making AMD more money (more chips per wafer, higher yields).
Actually I wonder if it would have been possible for AMD to pull something akin to the Tegra3, like having two cores on a high power process and the third one on a low power process. May be tricky from the OS pov, I don't know.
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