Radeon 9500 where is it?

[Thowllly]

I've wondered why there are so many people around the net that think DDRII uses four transfers per clock. Where did that strange idea come from? (I mean, it's still called DoubleDataRateII) Well, now I just found one source. Anand is one of the idiots spreading that myth.[/b]

 

[Sabastian]

[H] should have compared the Radeon 9500 Pro with the Geforce 4 Ti4200 using AA + AF as well. But for the most part I do agree Anand was attempting to downplay the actual value of the Radeon 9500 Pro in favour of the more expensive Radeon 9700 non pro.

 

[Brent]

[H] should have compared the Radeon 9500 Pro with the Geforce 4 Ti4200 using AA + AF as well. But for the most part I do agree Anand was attempting to downplay the actual value of the Radeon 9500 Pro in favour of the more expensive Radeon 9700 non pro.

Yeah... I wish I could have done that... I didn't have a Ti 4200 here to compare it to plus I didn't have a whole lot of time to test the card from recieving it to getting the review done for the launch

But believe you me when we get some retail cards to test I will definitely try to get ti 4200 numbers in there as well! I think even with 64MB of RAM the thing held its own pretty good against the Ti 4600! I was delightfully suprised Can't wait to try a 128MB model.

 

[Brent]

AFAIK these are not 'actual' cards, but Radeon 9700's with half the 256bit bus removed, thats why they only have access to 64MB of memory.

Yep, that is exactly what these cards are...

a hacked 9700 pro, heh

lower core speed, half the mem bus turned off with lower memory clock as well, it gives a general representation of a 9500 Pro, with the retail ones having 128MB standard the results for the retail card can only be better...

 

[Nite_Hawk]

Brent:

Will you be doing a 9500 non-pro review as well?

Nite_Hawk

 

[jandar]

Aye - I get frustrated at fellow gamers saying you dont need the power of the 9700 a Gf3/Gf4 is enough.

Pfft I say to that

But then many gamers know nothing about how AA or AF improve IQ (isnt AA that blurry feature that made the V5 so slow!!!!???).

I get a new gamer each week to try Ansio and AA for the first time it seems.

Last week was a GF3 user playing NFS, I told him to turn on Ansio, he looked kinda shocked when the image was cleaner and you could see the road lines in the distance versus a blur.

 

[Tokelil]

Am I the only one that is a bit disappointed that Ati dont have a working 9500 Pro yet? Thought they at least would have some real sampels to show by now. Couldn't they have show this card a month ago, since its just a hacked 9700 Pro?
Ati is promising that this card will perform almost like the real 9500 Pro... Does that mean that they have a real 9500 Pro to test in their own lab?

 

[OpenGL guy]

I've wondered why there are so many people around the net that think DDRII uses four transfers per clock. Where did that strange idea come from? (I mean, it's still called DoubleDataRateII) Well, now I just found one source. Anand is one of the idiots spreading that myth.

It's actually true. DDRII has a memory core clocked at one fourth of the external clock speed. Thus, you get four transfers per cycle. However, the external interface is still a DDR interface, hence the name DDRII In other words, DDR and DDRII clocked at the same external frequency, have about the same potential banwidth.

The main idea behind DDRII is to allow the memory to scale to higher frequencies as the memory array is clocked at a lower speed. One drawback to DDRII is increased latency due to doubling of the burst size.

 

[darkblu]

It's actually true. DDRII has a memory core clocked at one fourth of the external clock speed. Thus, you get four transfers per cycle.

you mean the mem core clock is 1/2 the external clock but the core handles four transfers per cycle. that'd be 'double data rate'. if it were 1/4 the external clock speed it'd have to perform 8 tranfers per cycle to be DDR.

 

[OpenGL guy]

It's actually true. DDRII has a memory core clocked at one fourth of the external clock speed. Thus, you get four transfers per cycle.

you mean the mem core clock is 1/2 the external clock but the core handles four transfers per cycle. that'd be 'double data rate'. if it were 1/4 the external clock speed it'd have to perform 8 tranfers per cycle to be DDR.

Whoops, thanks for the correction.

 

[alexsok]

Here we go:
http://www.anandtech.com/video/showdoc.html?i=1735
http://www.hardocp.com/article.html?art=Mzc0

 

[ram]

I'm quite surprised that ATI fabs 3 different R300 cores now!

ATI implemented a new (for ATI at least) design and manufacturing procedure when they introduced the R300 to make transitions to scaled down cores much easier. ...The same is not true for the Radeon 9500 Pro and Radeon 9500 GPUs; in both cases the added memory controllers (and in the case of the regular 9500 the 4 additional rendering pipes) are not physically present on the die.

&

Radeon 9500 whereby pixel pipelines had failed in some R300 chips could then still be utilised in for Radeon 9500 boards and they declined to comment, however the hint was that if you know the ASIC then you know that this type of thing occurs frequently.

Does anybody have an idea what exactly they changed in their procedure in order to simplify the hardware implementation? I guess from a design point of view, they implemented something that allows them the use of less pipelines or less memory controllers without any design modification, but how do they handle the backend? To save die space, they would at least have to replace parts of the blocks, so I guess you've to redo a lot of the verification process, don't you?

 

[sabeehali]

am i the only one disappointed...

Ok guys I just read the anandtech review and i am kinda disappointed by the performance of 9500 Pro do you think its cause used two 64 bit memcontrollers as opposed to 4 32 bit .

GF4's use 4 32 bit controllers and it would have shown us what more could be done to the mem controllers to make em better (If the gf4's were still performing better)

Another thing I did not like about the review (rather than the card) was 4x AA with 4x Anistropy why not 2x AA with 16 Anistropy which I think would be more in line with the memory and fillrate limitations.

Off the topic I think the mem speed is more crucial to the performance of R300 core rather than the core speed so why does ATI keep thier mem speed even lower than core speed?

Any comments on DDRII making the R9700 PRO even faster

Also why go to GDDR3 and not QDR?

 

[Joe DeFuria]

Another thing I did not like about the review (rather than the card) was 4x AA with 4x Anistropy why not 2x AA with 16 Anistropy which I think would be more in line with the memory and fillrate limitations.

Try HardOCP's and Tom's review. You'll probably wonder if Anand used the same card as Tom and HardOCP:

http://www.hardocp.com/article.html?art=Mzc0

http://www.tomshardware.com/graphic/02q4/021024/index.html


Hard OCP did 2X AA with 8X anisotropy. Seems to be what you're looking for. nVidia doesn't offer 16 X anisotropic, so that would explain Hard OCP not doing it in a direct comparison.

 

[Joe DeFuria]

Off the topic I think the mem speed is more crucial to the performance of R300 core rather than the core speed so why does ATI keep thier mem speed even lower than core speed?

It's likely just a matter of price point.

 

[arjan de lumens]

Re: am i the only one disappointed...

Also why go to GDDR3 and not QDR?

Clocking is more complicated with QDR - you need 2 clock lines (running 90 degrees out of phase - Pentium4 uses such a scheme) which complicates both board routing and internal design of the memory chip.

 

[Dave Baumann]

I'm quite surprised that ATI fabs 3 different R300 cores now!

Logically they do, phyisically they don't.

See here for an explaination of whats going on in the cores.

 

[sabeehali]

Re: am i the only one disappointed...

Also why go to GDDR3 and not QDR?

Clocking is more complicated with QDR - you need 2 clock lines (running 90 degrees out of phase - Pentium4 uses such a scheme) which complicates both board routing and internal design of the memory chip.

From what I have read the only difference between GDDR3 and DDRII is memory speed, I mean aside from different clocking etc. The main performance advantage is that GDDR3 will be introduced at around 800 MHZ long b4 ddrII but with QDR they can achieve it even quicker ( I mean effective bandwidth) Since 400 MHz QDR should not be a problem and since Via has started supporting QDR too ...... Do you really think routing and internal design is going to be a BIG problem ?

I think the main attraction of QDR was that it wasn't too hard to implement and with much better results than traditional DDR.

 

[ram]

Logically they do, phyisically they don't.
See here for an explaination of whats going on in the cores.

Ahh, thank you for clearing this up! This makes sense in contrary to Anands three different core claim.

 

[arjan de lumens]

Re: am i the only one disappointed...

From what I have read the only difference between GDDR3 and DDRII is memory speed, I mean aside from different clocking etc. The main performance advantage is that GDDR3 will be introduced at around 800 MHZ long b4 ddrII but with QDR they can achieve it even quicker ( I mean effective bandwidth) Since 400 MHz QDR should not be a problem and since Via has started supporting QDR too ...... Do you really think routing and internal design is going to be a BIG problem ?

I think the main attraction of QDR was that it wasn't too hard to implement and with much better results than traditional DDR.

The QDR implementation that VIA is working on (Kentron's QBM), requires support chips (FET switches and clock generation circuits) on each DIMM in addition to the actual DRAM chips - the DRAMs themselves are still just plain old DDR chips. Doing such a solution on a graphcis card will result in a rather large and crowded card, especially with a 256-bit bus. Also, I haven't heard of any QBM implementations working at more than about 166 MHz x 4, which is in about the same speed range as the DDR-I chips on graphics cards now. Other QDR schemes may avoid the support chips, but they need to produce a high-speed (4x or so) clock internally in order to be able to do the QDR signalling out where SDR/DDR chips can just use the standard clock signal.

The way I see it, QDR in general gives the same kind of speed boost as DDR-II, but is more complex to implement.