Ailuros said:
Do I need a lawyer or what!
...since you poined out that Simon's point wasn't clarified, and your 'keenness', I thought maybe you had an answer? if not speaking on his behalf, can you or anyone else clarify it?
There's nothing in that patent that suggests or even comes close to a TBDR and yes the author doesn't obviously have a clue either even more if he's a developer. If you want an experienced developer's opinion that has worked on many platforms out there including existing PS consoles, then read
DeanoC's reply as often as required to get a grasp of reality.
Can you point me to the 'multitude' of current systems that are currently using
parallel renderring of overlapping arbritary sized 'bricks' that are z-merged into tiles/quadrants, then said quadrants combined to form the final image? ...I'm not aware of these 'overlapping bricks' being in common use as described in that patent. If anyone does, then please enlighten me!
I'd have a hard time finding a platform that doesn't use an at least similar method right now. Did you even notice the mention of Supertiling at ATI above?
I'm not calling it a TBDR, it's like the tenth time in this thread that I've said 'hybrid'!
...Semantics aside, my interest lies in that patent (which also describes velocity based LOD and distributed rendering etc.) being realized for PS3 and the point of the Poll is if the architecture is flexible enough to provide in addition to that, Real-time REYES rendering/ Real-time GI rendering etc..
And for the last time that hybrid crap is complete bullshit. Or else we don't have any IMRs on the market right now, rather just "hybrid TBDRs" and yes the former Playstation consoles included. If it makes you happy to call them hybrid DR's be my guest; they're still
immediate mode renderers.
And yes, I was aware of ATI using tiling, but I'm not aware of it using the SCE patents object based 'bricks'/groups' that are overlapping, being rendered/shaded independently from each other with different techniques etc..etc.. A link to their 'supertiling patent' would be useful for comparision? ...Personally I'm hoping for REYES to deal with anti-aliasing using micro-polygons for PS3. 8)
http://www.beyond3d.com/forum/viewtopic.php?p=190448&highlight=supertiling#190448
http://www.beyond3d.com/forum/viewt...er=asc&highlight=supertiling&start=20
http://v3.espacenet.com/textdoc?DB=EPODOC&IDX=EP1424653&F=0
Related to Macro-/Micro-tiling here's a patent from IMG:
http://v3.espacenet.com/textdoc?DB=EPODOC&IDX=EP1287494&F=0
<snip>
In a preferred embodiment, this screen is divided up into a number of regions called macro-tiles, in which each of these consists of a rectangular region of the screen composed of a number of smaller tiles. Memory in the display list is then divided into blocks and these are listed in a free store list. Blocks from the free store are then allocated to the macro-tiles as required. The tiling operation stores polygon parameter data and object pointers for surfaces in each block associated with each macro-tile in which they are visible. When the memory for the parameters fills up, or reaches some predefined threshold, the system selects a macro-tile, performs a z/frame buffer load, and renders the contents of the macro-tile before saving it using a z/frame buffer store operation. Upon completion of such a render, the system frees any memory blocks associated with that macro-tile, thereby making them available for further parameter storage. The z/frame buffer load and store operations are restricted to the macro-tiles that are actually rendered rather than every tile on the screen as was previously the case. Tiling of either the remainder of the current frame or of the next frame to be displayed then continues in parallel with macro-tile renders and the allocation of blocks of memory from the same pool to further macro-tiles. It is not necessary to provide any double buffering of the parameter list and thus the memory requirements of the system are further reduced.
Many recent systems use similar methods when tiling, irrelevant whether they're display list or immediate mode renderers. However non of those methods define what an architecture really is. Either an accelerator renders data as it floats in or it stalls/defers the rendering until most or all scene data is supplied. That's a vast oversimplification since an IMR will defer under certain occassions too as a TBDR does not have to necessarily wait for all scene data to be delivered. The basic differences though remain.
I'm aware of TBDR being efficent with bandwidth and fillrate. But I see it both ways. If they are high values, it doesn't necessarily suggest the contrary, it could mean you get even more performance from the system!
*cough*
DeanoC wrote:
First I have no idea how that patent discribes a tile based defered renderer. If thats a TBDR than so is ATI...
Hope dies last I guess.
