Ailuros said:Jaws said:He's from ArsTechnica and sounded like a developer from his other posts. If you bump into Simon, then send him this way! ...In his absence does anyone else know what he meant?
That the author didn´t have a clue obviously?
IMO, when Simon made that comment about Jason's post, it's kinda rude not to give any explanation to the uninitiated...or clarify the post. A simple 'he's clueless' is not constructive, though, I'm sure Simon didn't intend to.. ...So in his absence can you elaborate on what Simon was implying?
Ailuros said:From the patent, it's 'tile' based alright. So it's atleast a TBR. So what's the definition of 'deferred' and 'non-deferred'? And what's a definition of anything in between? Hybrid, Semi?
Again accelerators have been using tile or chunk based memory optimisations for eons; fairly since the advent of 3D and yes even most if not all IMRs. A deferred renderer works ideally if all scene data gets collected prior to rendering and I think the former link provided illustrates it adequately.
Have you read the patent? Also please read my reply to Faf above. I'm not aware of any dealing with 'tiles' and overlapping 'bricks' to render scenes the way that patent describes.
Ailuros said:Didn't want to bring any figures into this thread...no concrete evidence of the above, so pick a figure really!
But there´s "concrete" evidence of PS3 being a TBDR? I targeted and asked about antialiasing and sample densities on purpose, just because it´s one of the departments a DR has well known advantages. I recall one engineer here not long ago mentioning something about 64x sample SSAA with 64bpp HDR at 1024*768*32 for a real TBDR.
Hey, there are patents for those at least and I've already mentioned to prefix 'hybrid' to TBDR at the beginning of the thread and it's also the 'title' of another linked thread! ...If your really interested in bandwidths, these would be my order of magnitudes,
eDRAM ~ hundreds of GB/s
CPU-GPU ~ tens of GB/s
XDR RAM ~ tens of GB/s
And on the subject of Anti-aliasing, that's why real-time REYES rendeing has been brought up with the recent Toshiba patent linked and thread using micro-polygons. Which is the reason for the Poll given the flexibilty of the PS3 Cell architecture.