*Hiroshige's Goto Weekly overseas news*
Possibility of Pentium 4 based Cell processor
- As for the multiple core of the SIMD type CPU core which is optimized in stream processing optimal solution
CPU technical trend of multiple core age (re-raising up)
As for PDF editionthis
With the previouscolumn, the point of new CPU "Cell processor" of the SONY group + IBM + Toshiba combined the CPU core of the type which differs, "ヘテロジニアス (Heterogeneous: When various mixture) there is a multiple core ", it explained. As for the purpose to which 3 corporations adopt the multiple core of the various mixed loading, there is rise of performance/electric power consumption efficiency. By the fact that it makes the processor core whose efficiency is higher, it is quite to actualize high performance by proper electric power consumption. Actually, Cell, when you compare with the existing general-purpose processor, is presumed that performance/electric power is high markedly.
"How to continue to make efficiency raise efficiently it is possible the largest proposition of present processor development?" it is. That, is because performance of the processor/electric power consumption efficiency is deteriorated extremely. This problem was the largest topic of processor industry of here 1 - 2 years, even in the conference and the like many times were picked up in theme.
February even with "ISSCC where Cell is announced (IEEE International Solid-State Circuits Conference) being similar 2005", panel discussion it is entitled "When Processors Hit the POWER Wall" of electric power consumption conversion was done low. In the same panel, William Dally of the Stanford University which is known in stream type processor research (Stanford University and Stream Processors), it has explained as follows concerning the improvement of efficiency of the processor.
First, when the present 90nm processor is compared, as for the energy which is necessary for the operation 1 time of 32bit you say that it differs largely. In case of the private logic of ASIC when it is 2pJ and DSP, when it is 60pJ and RISC system CPU, when 200pJ, that becomes the PC/ work station, you say that there is 1,000 time thing efficiency gap between 2000pJ and ASIC and the PC processor. Becoming cause of non efficiency of the PC processor, long wiring, array access and control overhead and データムーブメント etc. to the off tip/chip. Past over 25 as for the PC processor it is the case that the result and the gap where non improvement of efficiency was accumulated expand largely.
You say that and, leak (a leak) increase of electric current made this problem serious. By the fact that leak electric current increased, in the PC processor of the singles lead-lead of the high end, refining process, as for consumed energy per operation, you say that it is it reaching the point where it rises conversely.
Dally showed three approach as the method of solving this problem. (1) parallelism is raised by the fact that many small-sized processors are accumulated, the control overhead is decreased (2) SIMD (Single Instruction and Multiple Data) type processing with explicit cord/code management, (3) data migration is decreased with distributed with the register of hierarchical type. In other words, it is the case that by the fact that large number it accumulates the SIMD processor which had the structure which faces to stream type processing, to make the processor whose performance/electrical efficiency is very high it is possible.
This conception is reflected on the research project of the Stanford University really, but those where it is funny are that many parts of basic concept are piled up with Cell. Cell and it is it was optimized (there is no hierarchical type register in stream type processing, but because it does not have cash) SIMD type central CPU core "SPE (Synergistic Processor Element)" 8 it is on-board with the memory of scratchpad type. When you see from the flow such as that, you can call Cell that it came out of the inevitability of trend of the present processor.
- The approach which is optimum to the world of digital home appliance type
However, way you write on beginning, in case of Cell the processor core where character differs is combined. This control type task is structure in order to improve the both of efficiency of software environment of the conventional type whose thread change is many in the center and efficiency of data processing of stream type efficiently. Because of that, unlike the processor which specializes in stream processing, with Cell processor core "PPE for control because OS and the like can be sent (POWER Processor Element)" 1 it is on-board.
Under present conditions, because compatibility of these two processing efficiencies is required with many applications, the multiple core of the CPU core mixture for CPU core + data processing of control like Cell can become rational solution. Because of that, there is a possibility similar ヘテロジニアスマルチコア structure spreading even in the processor other than Cell. With the installation the CPU core + DSP core as for approach it exists even with the former flow, perhaps whether with you say, but there is a tendency where that is strengthened.
"The other (processor) even in field) trend of such (ヘテロジニアスマルチコア is visible in many applications. Installed processor and communication processor.... Also the people other than us, have aimed toward the organization of this kind. Perhaps, in the future, to look) at オーガニイゼーション of many such (ヘテロジニアスマルチコア types it probably means ", that, Jim Kahle of IBM which takes charge of Cell development (the gym kale) the person (IBM Fellow) you talk.
For example, when it tries supposing the application like digital TV and the foam/home server, advantage of ヘテロジニアスマルチコア is well recognized. The general-purpose processor core of efficiency approximately because it is OS and GUI and the networks tack/tuck etc. wants with the digital image type equipment of this kind. And, with video processing, for supporting many compressed standards and the various trance cords/codes etc., it is not fixing hard, the high performance which has pliability the programmable processor is desirable. But, when the respective separate tip/chip is prepared in OS, encoding/decoding and the trance cord/code, in the cost aspect it becomes disadvantageous. In addition, as for doing all processing with general purpose CPU, wastefulness is too multi.
So when it does, relatively ヘテロジニアスマルチコア of the Cell type which has high general-purpose efficiency and very high stream processing efficiency, surfaces as one of reply. If as for the SONY and Toshiba that strategy, you see from architecture, it will develop Cell, digitally TV and foam/home server, it is very logical. As for the development which calls Cell to the digital home appliance, agreement is possible as a vision and, there is also a possibility CPU of the kind of conception which is similar other than Cell coming out. Also the communication equipment, is, is the kind of circumstance which is similar.
- To raise CPU efficiency rapidly, there are no choices
Like this when it tries doing, with the installed use which centers the digital home appliance, there is ヘテロジニアスマルチコア it means to be clear vision.
So, in computing field how probably will be. Probably is there an element where it can succeed the approach which is similar to Cell or Cell derivation CPU or Cell?
First, when it changes to the side which calls conception CPU performance, CPU of the computing field such as the PC/ server/Mobile PC, as for having hit against the wall of performance improvement is clear. Especially, with PC because it is bound in the spell, maintenance of singles lead efficiency of existing software property, performance/electric power and the performance/die/di area is deteriorated.
Intel because of that, while making efficiency raise, efficiency of the existing software has researched the technique which also efficiency improves. With this direction, it introduced with this corner of the time before like "PARROT", observing with the localized characteristic of the cord/code, it is thought that the technique which does locally deep optimization scheduling is promising. Similar technique, it is the software base, but Efficeon of Transmeta uses. But, the efficiency which is raised with such approach is limited very. To the last, it is useful method only when singles lead efficiency of existing software property is seriously considered.
Vis-a-vis that, rapidly to improve performance/electric power it is possible the approach which raises the efficiency of stream type data processing with kind of ヘテロジニアスマルチコア which Cell takes. For existing PC it cannot overtake with the approach of CPU, in this efficiency. When with x86 system CPU of present condition, it tries probably to make the multiple core CPU which can achieve 256GFLOPS of Cell under present conditions, enormous electric power consumption, very that it probably will become CPU of 1,000W class.
Because of that, with PC environment and data processing of high performance of Cell class is required, if, ヘテロジニアスマルチコア the possibility to the world of PC of coming entering comes out. Actually, also Intel is visible, as started pointing the same direction with "Many-core" of the constitution, rich of conventional type small-sized CPU core of CPU core + efficiency concern.
- Cell computing conception and Cell processor
The hurdle in that case, as the last time pointed out, is the software. With the multiple core of ヘテロジニアス type, assuming, that instruction set of the CPU core which differs even if is common the considerable correspondence of OS and application side becomes necessary. If instruction set differs, as for the program it is necessary to have compiling anew in new order.
To tell the truth, Cell has shown the approach for this problem. Because as for that, as for the philosophy of Cell there is portable conversion of the cord/code. JAVA and NET the portability which you have aimed, will be actualized is the basic conception of Cell in the hardware base. Because of that, if, Cell can obtain big support, there is a possibility the following kind of Cell computing world being formed.
With the success of Cell, approach of Cell type spreads in addition to the present Cell processor. The SPE type CPU core is loaded, Cell like CPU which had structure starts appearing, large number in addition to current Cell. Perhaps rich of PowerPC G5 class also CPU for Macintosh which loads PowerPC core + SPE and the inexpensive installed edition etc. which places simpler PPE and 4 SPE can be. Instead of, the CPU core for control of main the POWER is also a possibility also those of the instruction set which differs appearing. If extreme thing is said, Pentium being able to be CPU of the constitution such as x86 CPU core + of 4 and Athlon 64 class SPE, it is in principle strange expectation. Each SPE loading CPU, on the CPU core for control, being able to send the execution time engine in order to control SPE on OS, is thought that it is possible also to absorb difference.
In that case, the software developer writes application with the instruction set of SPE. As for this, it is desirable to have paralleled to the object format of software Cell. When it does, the same application, runs to high performance with whichever of CPU which loads SPE. When efficiency is not enough with SPE loading CPU of the single unit, making use of the resource of other SPE loading CPU with respect to network, it decentralizes processing. With that, being the platform independent, (really depends on SPE but), in fact the software execution environment which does not have restriction in performance is completed.
The form of the Cell computing which perhaps, has been drawn finally is presumed that it becomes this kind of ones. Of course, under present conditions as for this it is the fantasy story, but there is that much latent developmental characteristic into "Cell computing".
http://pc.watch.impress.co.jp/docs/2005/0225/kaigai159.htm
Possibility of Pentium 4 based Cell processor
- As for the multiple core of the SIMD type CPU core which is optimized in stream processing optimal solution
CPU technical trend of multiple core age (re-raising up)
As for PDF editionthis
With the previouscolumn, the point of new CPU "Cell processor" of the SONY group + IBM + Toshiba combined the CPU core of the type which differs, "ヘテロジニアス (Heterogeneous: When various mixture) there is a multiple core ", it explained. As for the purpose to which 3 corporations adopt the multiple core of the various mixed loading, there is rise of performance/electric power consumption efficiency. By the fact that it makes the processor core whose efficiency is higher, it is quite to actualize high performance by proper electric power consumption. Actually, Cell, when you compare with the existing general-purpose processor, is presumed that performance/electric power is high markedly.
"How to continue to make efficiency raise efficiently it is possible the largest proposition of present processor development?" it is. That, is because performance of the processor/electric power consumption efficiency is deteriorated extremely. This problem was the largest topic of processor industry of here 1 - 2 years, even in the conference and the like many times were picked up in theme.
February even with "ISSCC where Cell is announced (IEEE International Solid-State Circuits Conference) being similar 2005", panel discussion it is entitled "When Processors Hit the POWER Wall" of electric power consumption conversion was done low. In the same panel, William Dally of the Stanford University which is known in stream type processor research (Stanford University and Stream Processors), it has explained as follows concerning the improvement of efficiency of the processor.
First, when the present 90nm processor is compared, as for the energy which is necessary for the operation 1 time of 32bit you say that it differs largely. In case of the private logic of ASIC when it is 2pJ and DSP, when it is 60pJ and RISC system CPU, when 200pJ, that becomes the PC/ work station, you say that there is 1,000 time thing efficiency gap between 2000pJ and ASIC and the PC processor. Becoming cause of non efficiency of the PC processor, long wiring, array access and control overhead and データムーブメント etc. to the off tip/chip. Past over 25 as for the PC processor it is the case that the result and the gap where non improvement of efficiency was accumulated expand largely.
You say that and, leak (a leak) increase of electric current made this problem serious. By the fact that leak electric current increased, in the PC processor of the singles lead-lead of the high end, refining process, as for consumed energy per operation, you say that it is it reaching the point where it rises conversely.
Dally showed three approach as the method of solving this problem. (1) parallelism is raised by the fact that many small-sized processors are accumulated, the control overhead is decreased (2) SIMD (Single Instruction and Multiple Data) type processing with explicit cord/code management, (3) data migration is decreased with distributed with the register of hierarchical type. In other words, it is the case that by the fact that large number it accumulates the SIMD processor which had the structure which faces to stream type processing, to make the processor whose performance/electrical efficiency is very high it is possible.
This conception is reflected on the research project of the Stanford University really, but those where it is funny are that many parts of basic concept are piled up with Cell. Cell and it is it was optimized (there is no hierarchical type register in stream type processing, but because it does not have cash) SIMD type central CPU core "SPE (Synergistic Processor Element)" 8 it is on-board with the memory of scratchpad type. When you see from the flow such as that, you can call Cell that it came out of the inevitability of trend of the present processor.
- The approach which is optimum to the world of digital home appliance type
However, way you write on beginning, in case of Cell the processor core where character differs is combined. This control type task is structure in order to improve the both of efficiency of software environment of the conventional type whose thread change is many in the center and efficiency of data processing of stream type efficiently. Because of that, unlike the processor which specializes in stream processing, with Cell processor core "PPE for control because OS and the like can be sent (POWER Processor Element)" 1 it is on-board.
Under present conditions, because compatibility of these two processing efficiencies is required with many applications, the multiple core of the CPU core mixture for CPU core + data processing of control like Cell can become rational solution. Because of that, there is a possibility similar ヘテロジニアスマルチコア structure spreading even in the processor other than Cell. With the installation the CPU core + DSP core as for approach it exists even with the former flow, perhaps whether with you say, but there is a tendency where that is strengthened.
"The other (processor) even in field) trend of such (ヘテロジニアスマルチコア is visible in many applications. Installed processor and communication processor.... Also the people other than us, have aimed toward the organization of this kind. Perhaps, in the future, to look) at オーガニイゼーション of many such (ヘテロジニアスマルチコア types it probably means ", that, Jim Kahle of IBM which takes charge of Cell development (the gym kale) the person (IBM Fellow) you talk.
For example, when it tries supposing the application like digital TV and the foam/home server, advantage of ヘテロジニアスマルチコア is well recognized. The general-purpose processor core of efficiency approximately because it is OS and GUI and the networks tack/tuck etc. wants with the digital image type equipment of this kind. And, with video processing, for supporting many compressed standards and the various trance cords/codes etc., it is not fixing hard, the high performance which has pliability the programmable processor is desirable. But, when the respective separate tip/chip is prepared in OS, encoding/decoding and the trance cord/code, in the cost aspect it becomes disadvantageous. In addition, as for doing all processing with general purpose CPU, wastefulness is too multi.
So when it does, relatively ヘテロジニアスマルチコア of the Cell type which has high general-purpose efficiency and very high stream processing efficiency, surfaces as one of reply. If as for the SONY and Toshiba that strategy, you see from architecture, it will develop Cell, digitally TV and foam/home server, it is very logical. As for the development which calls Cell to the digital home appliance, agreement is possible as a vision and, there is also a possibility CPU of the kind of conception which is similar other than Cell coming out. Also the communication equipment, is, is the kind of circumstance which is similar.
- To raise CPU efficiency rapidly, there are no choices
Like this when it tries doing, with the installed use which centers the digital home appliance, there is ヘテロジニアスマルチコア it means to be clear vision.
So, in computing field how probably will be. Probably is there an element where it can succeed the approach which is similar to Cell or Cell derivation CPU or Cell?
First, when it changes to the side which calls conception CPU performance, CPU of the computing field such as the PC/ server/Mobile PC, as for having hit against the wall of performance improvement is clear. Especially, with PC because it is bound in the spell, maintenance of singles lead efficiency of existing software property, performance/electric power and the performance/die/di area is deteriorated.
Intel because of that, while making efficiency raise, efficiency of the existing software has researched the technique which also efficiency improves. With this direction, it introduced with this corner of the time before like "PARROT", observing with the localized characteristic of the cord/code, it is thought that the technique which does locally deep optimization scheduling is promising. Similar technique, it is the software base, but Efficeon of Transmeta uses. But, the efficiency which is raised with such approach is limited very. To the last, it is useful method only when singles lead efficiency of existing software property is seriously considered.
Vis-a-vis that, rapidly to improve performance/electric power it is possible the approach which raises the efficiency of stream type data processing with kind of ヘテロジニアスマルチコア which Cell takes. For existing PC it cannot overtake with the approach of CPU, in this efficiency. When with x86 system CPU of present condition, it tries probably to make the multiple core CPU which can achieve 256GFLOPS of Cell under present conditions, enormous electric power consumption, very that it probably will become CPU of 1,000W class.
Because of that, with PC environment and data processing of high performance of Cell class is required, if, ヘテロジニアスマルチコア the possibility to the world of PC of coming entering comes out. Actually, also Intel is visible, as started pointing the same direction with "Many-core" of the constitution, rich of conventional type small-sized CPU core of CPU core + efficiency concern.
- Cell computing conception and Cell processor
The hurdle in that case, as the last time pointed out, is the software. With the multiple core of ヘテロジニアス type, assuming, that instruction set of the CPU core which differs even if is common the considerable correspondence of OS and application side becomes necessary. If instruction set differs, as for the program it is necessary to have compiling anew in new order.
To tell the truth, Cell has shown the approach for this problem. Because as for that, as for the philosophy of Cell there is portable conversion of the cord/code. JAVA and NET the portability which you have aimed, will be actualized is the basic conception of Cell in the hardware base. Because of that, if, Cell can obtain big support, there is a possibility the following kind of Cell computing world being formed.
With the success of Cell, approach of Cell type spreads in addition to the present Cell processor. The SPE type CPU core is loaded, Cell like CPU which had structure starts appearing, large number in addition to current Cell. Perhaps rich of PowerPC G5 class also CPU for Macintosh which loads PowerPC core + SPE and the inexpensive installed edition etc. which places simpler PPE and 4 SPE can be. Instead of, the CPU core for control of main the POWER is also a possibility also those of the instruction set which differs appearing. If extreme thing is said, Pentium being able to be CPU of the constitution such as x86 CPU core + of 4 and Athlon 64 class SPE, it is in principle strange expectation. Each SPE loading CPU, on the CPU core for control, being able to send the execution time engine in order to control SPE on OS, is thought that it is possible also to absorb difference.
In that case, the software developer writes application with the instruction set of SPE. As for this, it is desirable to have paralleled to the object format of software Cell. When it does, the same application, runs to high performance with whichever of CPU which loads SPE. When efficiency is not enough with SPE loading CPU of the single unit, making use of the resource of other SPE loading CPU with respect to network, it decentralizes processing. With that, being the platform independent, (really depends on SPE but), in fact the software execution environment which does not have restriction in performance is completed.
The form of the Cell computing which perhaps, has been drawn finally is presumed that it becomes this kind of ones. Of course, under present conditions as for this it is the fantasy story, but there is that much latent developmental characteristic into "Cell computing".
http://pc.watch.impress.co.jp/docs/2005/0225/kaigai159.htm
**HEADACHE** :?
