Hey everyone,
I thought I'd discuss the exact implications of this deal here, and I'm sure many of you will do so too here.
First of all, let me remind you that a PDA chip *is* in the works at nVidia ( and no, that isn't the NV33 AFAIK - or it might be, who knows, hehe ) - it's fairly obvious considering this acquisition, but I posted it at GPU:RW before that press release
So, obviously, nVidia needs their low-power technology. But... Is the need for that low-power technology limited to PDAs and other devices?
It's fairly obvious nVidia is limited in the NV35 ( and NV30, since they needed Flow FX ) by heat: And heat is very closely related to power, as you hopefully all know...
So, let's look at this in an IP perspective: what patents does MediaQ currently own?
1. Method and apparatus to power up an integrated device from a low power state : http://patft.uspto.gov/netacgi/nph-...&co1=AND&d=ptxt&s1=MediaQ&OS=MediaQ&RS=MediaQ
2. Graphics engine FIFO interface architecture: http://patft.uspto.gov/netacgi/nph-...&co1=AND&d=ptxt&s1=MediaQ&OS=MediaQ&RS=MediaQ
3. Parsing graphics data structure into command and data queues: http://patft.uspto.gov/netacgi/nph-...&co1=AND&d=ptxt&s1=MediaQ&OS=MediaQ&RS=MediaQ
4. Programmable and flexible power management unit : http://patft.uspto.gov/netacgi/nph-...&co1=AND&d=ptxt&s1=MediaQ&OS=MediaQ&RS=MediaQ
Okay, so what do we see here?
2 patents related to general GPU stuff, things nVidia doesn't need *at all*.
2 patents related to power consumption, not limited to GPUs.
I believe the most interesting of these patents is the last one. Here's the abstract:
I've bolded what I consider particularly interesting: this could actually be used in a much more general way, in order to disable circuits in the GPU which aren't used currently.
Obviously, in current architectures, the use is obvious: If a part of the pipeline ( VS, PS or Triangle Setup ) is stalled, do something like disable half of its units. Of course, that's the brute force approach, and better techniques would work, well, better.
In the future, however, we're going to unite Pixel Shader, Vertex Shader, and so on. So, will this remain useful? Absolutely!
Moving to instruction-level parallelism does not prevent you from having unused circuits. For efficiency purposes, I believe we're also likely not to be able to run more than 3 or 4 programs at once in the GPU ( VS, PS and PPP programs, mostly, I suppose ) - so, good luck always using ALL units!
And there must be other reasons I fail to apprehend too, I guess. Which is obviously why feedback is appreciated!
Also, the first patent I linked to here enables to reduce/increase clock speed. That might also be used by automatically increasing / decreasing clock speed based on a goal FPS value. Such an implementation might actually be stranger, and it might be good to be able to disactivate such a thing in the driver panel. But sometimes, I believe it could be a quite nifty feature, particularly for old games I guess...
Obviously, MediaQ is also very important for PDAs and other small devices, and that's the primary use of the acquisition. They got quite a bit of very nifty technology IMO, and I must admit that on the long-term, I think nVidia made a worthwhile acquisition here. But then, who am I to say that, an analyst?
Feedback, comments, flames, whatever?
Uttar
I thought I'd discuss the exact implications of this deal here, and I'm sure many of you will do so too here.
First of all, let me remind you that a PDA chip *is* in the works at nVidia ( and no, that isn't the NV33 AFAIK - or it might be, who knows, hehe ) - it's fairly obvious considering this acquisition, but I posted it at GPU:RW before that press release
So, obviously, nVidia needs their low-power technology. But... Is the need for that low-power technology limited to PDAs and other devices?
It's fairly obvious nVidia is limited in the NV35 ( and NV30, since they needed Flow FX ) by heat: And heat is very closely related to power, as you hopefully all know...
So, let's look at this in an IP perspective: what patents does MediaQ currently own?
1. Method and apparatus to power up an integrated device from a low power state : http://patft.uspto.gov/netacgi/nph-...&co1=AND&d=ptxt&s1=MediaQ&OS=MediaQ&RS=MediaQ
2. Graphics engine FIFO interface architecture: http://patft.uspto.gov/netacgi/nph-...&co1=AND&d=ptxt&s1=MediaQ&OS=MediaQ&RS=MediaQ
3. Parsing graphics data structure into command and data queues: http://patft.uspto.gov/netacgi/nph-...&co1=AND&d=ptxt&s1=MediaQ&OS=MediaQ&RS=MediaQ
4. Programmable and flexible power management unit : http://patft.uspto.gov/netacgi/nph-...&co1=AND&d=ptxt&s1=MediaQ&OS=MediaQ&RS=MediaQ
Okay, so what do we see here?
2 patents related to general GPU stuff, things nVidia doesn't need *at all*.
2 patents related to power consumption, not limited to GPUs.
I believe the most interesting of these patents is the last one. Here's the abstract:
A programmable Power Management Unit (PMU) is provided. The Power Management Unit (PMU) supports a number of different power states namely a normal power state, a software-controlled sleep power sate, a hardware-controlled sleep power state, and two register programmable power states. In the normal power state, all circuits in the integrated circuit (e.g., graphics/display controller) are enabled. In the software-controlled sleep power state, all circuits in the integrated circuit are disabled except for frame buffer memory refresh logic and part of the bus interface. In the hardware-controlled sleep power state, all circuits in the integrated circuit are disabled except for the memory interface logic. In the two register programmable power states, circuits can be selectively powered up or down as desired in a single power sequencing. Moreover, under the present invention, the interval between circuits that are being disabled or enabled in a power sequencing is also programmable.
I've bolded what I consider particularly interesting: this could actually be used in a much more general way, in order to disable circuits in the GPU which aren't used currently.
Obviously, in current architectures, the use is obvious: If a part of the pipeline ( VS, PS or Triangle Setup ) is stalled, do something like disable half of its units. Of course, that's the brute force approach, and better techniques would work, well, better.
In the future, however, we're going to unite Pixel Shader, Vertex Shader, and so on. So, will this remain useful? Absolutely!
Moving to instruction-level parallelism does not prevent you from having unused circuits. For efficiency purposes, I believe we're also likely not to be able to run more than 3 or 4 programs at once in the GPU ( VS, PS and PPP programs, mostly, I suppose ) - so, good luck always using ALL units!
And there must be other reasons I fail to apprehend too, I guess. Which is obviously why feedback is appreciated!
Also, the first patent I linked to here enables to reduce/increase clock speed. That might also be used by automatically increasing / decreasing clock speed based on a goal FPS value. Such an implementation might actually be stranger, and it might be good to be able to disactivate such a thing in the driver panel. But sometimes, I believe it could be a quite nifty feature, particularly for old games I guess...
Obviously, MediaQ is also very important for PDAs and other small devices, and that's the primary use of the acquisition. They got quite a bit of very nifty technology IMO, and I must admit that on the long-term, I think nVidia made a worthwhile acquisition here. But then, who am I to say that, an analyst?
Feedback, comments, flames, whatever?
Uttar