Yeah only that now it seems Sea Islands really is AMD's next gen name and he was adamant that there is no Sea Islands and the next generation was Central Islands
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Yeah only that now it seems Sea Islands really is AMD's next gen name and he was adamant that there is no Sea Islands and the next generation was Central Islands
I think he's definitely "within", but I do not think it is appropriate to emphasize his articles: for example, only 3 months before the debut of the gtx 460, he claimed that the GPU would be simply "half GF100" ... http: / / semiaccurate.com/2010/04/05/new-nvidia-code-names-pop /
I won't quote myself just a couple of posts back but:
http://www.obr-hardware.com/2012/02/semiaccurace-is-absolutely-wrong-about.html
That's quite a quick update and just for the record's sake here are the first exclusive GK110 specifications:
4*32SPs/SM
8 TMUs/SM
4 SMs/GPC
8 GPCs
64 ROPs
850MHz
Let's see if updates get any quicker.
http://www.obr-hardware.com/2012/02/semiaccurace-is-absolutely-wrong-about.html
That's quite a quick update and just for the record's sake here are the first exclusive GK110 specifications:
4*32SPs/SM
8 TMUs/SM
4 SMs/GPC
8 GPCs
64 ROPs
850MHz
Let's see if updates get any quicker.
Lets not start digging out articles where Charlie was wrong or comparing them to the number where he was right and where it is debatable whether or not. He's running his website for hits and traffic, he has his sources and he has his way of interpreting things.
iMacmatician
Regular
4096 SPs, or am I misreading something?
No you're not.
caveman-jim
Regular
Yeah only that now it seems Sea Islands really is AMD's next gen name and he was adamant that there is no Sea Islands and the next generation was Central Islands
In English, 'C Islands' and 'Sea Islands' are phonetically the same, so over the phone you can see how they are confused; additionally, if you were looking to see who was ripping you off, you'd use that confusion to publish 'C.I.' as the next gen codename and see where it popped up. Charlie spends a lot of his time flushing out plagiarism. AMD have publicly called it 'Sea Islands' so that's the codename, until it's not. Like if it is actually 'C Islands' and it means 'Canary Islands' for example. But that's a group of Sea Islands, too. Round and round we go...
Fundamentally I believe Charlie above OBR. I base that on my entirely subjective personal opinion of having met and chatted with Charlie, vs. no idea who OBR is. /saltgrains
Is Charlie right about everything? No, and he doesn't make it easy for people to see what he's saying, either. Lots of snark, obfuscating real info to protect sources and see who's ripping him off; it makes general readability and information intake harder. Plus his articles are editorial, his opinion, speculation - not dry, just-the-facts-ma'am reporting. In some respects I find that more honest, as everybody editorializes, takes liberties, his is just way more obvious than others.
caveman-jim
Regular
There's a middle range of reactions; in this case it was an exasperated tone, but no extreme physical reaction; it was a convo over dinner, anyway.
There's a thread dedicated to Charlie, if anybody really wants to paint him as hero, that's the place to do it. His relevance to a (hopefully) technical discussion about Kepler is unapparent to me, so I think that we should stick to that particular sort of discussing without dirtying it.
Even more hard to believe is 256 TMUs.
Where did you get that from...
256TMUs and 4096 SPs (even without hot clock) sounds too ambitious even for nvidia. Sounds more appropriate for a 20nm monster chip...
(I like the idea of more SPs per SM though which reduces the overdone geometry stuff a bit. I think that's what GK110 should about look like except I only really see that as possible on 28nm with 4 GPCs...)
While that's true it seem a fair bet to assume a tmu has to be capable of single-cycle bilinear filtering (with all necessary adressing capabilities too of course) for at least int8, so there's imho not that much difference what makes sense as far as capabilites go for a tmu. Similar for SPs single cycle fma seems a given these days. ROPs probably are more diversified but then again that's the only number there which doesn't look outrageouspsurge said:
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caveman-jim
Regular
Sorry, boss!
To topic; a tape out for GK110 now is almost a year behind AMD (tahiti/28nm); is that a large knock on effect from the interconnect problems - the fix implemented for GF110 caused abandoning GK100 to work on GK110 with improvements found in the fix stage of GF110?
What makes you think there are interconnect problems? It seemed to do its job just fine on Fermi.caveman-jim said:
DarthShader
Regular
How many schedulers per SM?
Isn't GK 110 rumored to be a dual GPU card? Specs make more sense that way.
Don't think so. There wouldn't be enough rops with these specs for a dual card, unless these are some uber-rops (not that I think GF110 couldn't do with only 32 rops but reducing it (per chip) for next gen seems highly unlikely). At least unless you'd also assume that the dual card has more than 2x256bit memory interface. Unless that's really a chip only built for dual chip cards? Doesn't make much sense to me.
It does not have ot be the first tape-out. And he does not need to have the date correctly. Say the final production version tapped out late 2011 (late December), everything would be on target. Especially considering the limited 28nm wafers. (before Q3/12)
