You'll be 40 TMUs old?
You mean nVidia NDA'd people and then told them false info?
And while I'm at it, I don't think it's 240 either
And while I'm at it, I don't think it's 240 either
I always thought it would make more sense to call the card GT 280 if it actually had 280 SPs.
Though in the one slide, the area they highlight as "Thread Processor Cluster" is certainly smaller than what others have sectioned out. That would certainly lead to significantly more than just 10 clusters.
Blimey a dedicated double-precision unit?Each SM has the same basic setup as one in G80 (and every other G8x or G9x chip). So 8 FP32 SPs each with a MADD plus the MUL/special. So it's 240 SPs in that respect. But there's more to it than that, ALU wise.
I always thought it would make more sense to call the card GT 280 if it actually had 280 SPs. Though in the one slide, the area they highlight as "Thread Processor Cluster" is certainly smaller than what others have sectioned out. That would certainly lead to significantly more than just 10 clusters.
Each SM has the same basic setup as one in G80 (and every other G8x or G9x chip). So 8 FP32 SPs each with a MADD plus the MUL/special. So it's 240 SPs in that respect. But there's more to it than that, ALU wise.
Right, that's why I said per SM, rather than per cluster The changes I'm talking about are at the SM level (and then higher up at the scheduler, and then out into the RF).What does the "same basic setup" mean? If G200 had the same basic setup, it would have had 2x8SP arrays per cluster, isn't it?
Right, that's why I said per SM, rather than per cluster The changes I'm talking about are at the SM level (and then higher up at the scheduler, and then out into the RF).