NV30 production problems
- Thread starter CMKRNL
- Start date
CMKRNL said:
I know you have posted pretty good insight before .. but this would be an outright disaster for nvidia at this point. Although I am not surprised that it is going to take another "spin out" it flys in the face of all that is holy and what the CEO stated about the availability before Christmas. The market would be extremely disapointed with a total paper launch followed by a few months before the chip is reviewed. Who knows maybe it will require yet another "respin". Anyhow I can't really make any conclusion on your statement so it goes into the "unsubstaintiated rumor" bin.
CMKRNL said:
Yikes. Although I'm not sure I understand this correctly: According to your source it's TSMC that is causing the issues with their .13 process - not the NV30 design itself? Then how can a 'quick' respin of the NV30 chip solve things? Are we talking about problems with reaching the planed clock speed? Please elaborate if you can.
I don't think he can provide a link because, I think, he knows people who work there or at an appropriate place that is involved with needed work. From what I recall, everything he's stated previously has been spot on.
MY uneducated guess is, it almost seems like portions of TSMC's 0.13 library arn't working correctly, or not interacting properly. Could that be why they say a respin to work-around the issue?
--|BRiT|
MY uneducated guess is, it almost seems like portions of TSMC's 0.13 library arn't working correctly, or not interacting properly. Could that be why they say a respin to work-around the issue?
--|BRiT|
An explaination could be that TSMC provided incorrect models for their standard cell library. If you use those numbers to do your synthesis and timing analysis and they're wrong...you'll get a non-functioning (or slowly functioning chip) that may be functionally correct, but cannot operate at any useful speeds.
Updating those and redoing the synthesis would fix the problem. Of course, it would cost time.
(Note: I'm not saying thats what happened. I'm just saying thats one way that a screwup at TSMC could be fixed by a respin)
Updating those and redoing the synthesis would fix the problem. Of course, it would cost time.
(Note: I'm not saying thats what happened. I'm just saying thats one way that a screwup at TSMC could be fixed by a respin)
It might result in a full layer change. But its all complete speculation.
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Boy does this have VSA-100 written all over it. Obviously, the problem(s) are apples to oranges...But if you recall, 3dfx were insisting for a long time that they were going to be able to release the thing, when everybody else knew it wasn't going to happen...
If this information is reliable, it seems impossible to fathom this thing being released to _consumers_ anytime this year.
If this information is reliable, it seems impossible to fathom this thing being released to _consumers_ anytime this year.
sancheuz,
since your still "new" here I will let you in on some advice, CMKRNL has been right many times in the past. Sure anyone can get lucky on a call. But when they do it over and over, well then it anit luck. Not saying I would follow what CMKRNL says as the gospel. But I do put a heck of a lot more stock to what he says...
since your still "new" here I will let you in on some advice, CMKRNL has been right many times in the past. Sure anyone can get lucky on a call. But when they do it over and over, well then it anit luck. Not saying I would follow what CMKRNL says as the gospel. But I do put a heck of a lot more stock to what he says...
Sabastian said:RussSchultz said:
Sigh. IT MIGHT be bad news for Nvidia. I was speculating on a possible fact pattern that would fit the rumor.
It also could be that the rumor could be fit with a fact pattern that could be solved by product engineers at the fab and not involve a respin or a full layer change.
or it could be the rumor is complete hogwash.
Hmmm, I think that this speculation by the News Editor at Semiconductor Fabtech has been mentioned before, but here we go again about the low k nightmare:
http://www.fabtech.org/industry.news/2002/05.08.02-top1.shtml
RussSchultz, if the process is broken how can you fix it by tweaking your silicon?
Edit: I ask because TCMS have a less advanced but nice working .13 process on less complex chip designs.
http://www.fabtech.org/industry.news/2002/05.08.02-top1.shtml
RussSchultz, if the process is broken how can you fix it by tweaking your silicon?
Edit: I ask because TCMS have a less advanced but nice working .13 process on less complex chip designs.
