Next Generation Hardware Speculation with a Technical Spin [2018]

[McHuj]

Quadcore 28nm Jaguar module [without the GPU] was built by AMD to target 15W. Gen8 consoles had custom APU with two of those modules.

I think that 30-40W is a good target for gen9 console, and this 2700E fits quite well into that.

I agree ~30W for the CPU ~90W for GPU and somewhere in the ~150W for the whole console making it very similar to the current gen.

Likewise, I think the die are will have a similar breakdown between CPU and GPU.

Compared to the 2700e, maybe they cut down on the L3 cache size. It’s 16MB in the 2700E.

 

[Deleted member 13524]

Quadcore 28nm Jaguar module [without the GPU] was built by AMD to target 15W.

On Jaguar, 15W was for an APU with an embedded 2-CU GPU.
I'd say each quad-core module in Jaguar at their standard ~1.6GHz probably consumes half of 15W or less. That said, the 2013 consoles might have 10-15W for the 2x 4-core modules.

Regardless, we don't know if the CCX in Zen2 will have 4 cores. Considering that Intel is now making 8-core Coffee Lake S CPUs, it's possible that AMD will increase the core amount in each CCX to e.g. 6 cores. That way they'd get 6-core/12-thread APUs and 12-core/24-thread CPUs.
A single 6-core CCX at >3GHz would probably be enough to bring a substantial CPU performance upgrade and allow BC.

 

[Xbat]

They won't have less than 8 cores I think. Doesn't read well for marketing for the usual console audience. I also suspect the first gen PS5 and Xbox to be in the 180-200 wat range.

 

[anexanhume]

I agree ~30W for the CPU ~90W for GPU and somewhere in the ~150W for the whole console making it very similar to the current gen.

Likewise, I think the die are will have a similar breakdown between CPU and GPU.

Compared to the 2700e, maybe they cut down on the L3 cache size. It’s 16MB in the 2700E.

It’s 8MB per CCX, and the L3’s are connected for coherency reasons. Given it’s strictly a victim cache, they could probably move it up or down in size if they felt it had a workload advantage without causing too much disruption to the overall hierarchy.

On Jaguar, 15W was for an APU with an embedded 2-CU GPU.
I'd say each quad-core module in Jaguar at their standard ~1.6GHz probably consumes half of 15W or less. That said, the 2013 consoles might have 10-15W for the 2x 4-core modules.

Regardless, we don't know if the CCX in Zen2 will have 4 cores. Considering that Intel is now making 8-core Coffee Lake S CPUs, it's possible that AMD will increase the core amount in each CCX to e.g. 6 cores. That way they'd get 6-core/12-thread APUs and 12-core/24-thread CPUs.
A single 6-core CCX at >3GHz would probably be enough to bring a substantial CPU performance upgrade and allow BC.

My understanding is that the current CCX arrangement has a specific number of hops for inter-core, inter-CCX communication. Adding two more cores to a CCX would increase that by 1 hop, which isn’t desirable from a latency perspective. I would imagine it’s more beneficial to stay at 4 per CCX and simply work on beefing up the intra-CCX latencies and the infinity fabric for inter-CCX traffic.

 

[Metal_Spirit]

Tom's hardware France claims 6 to 8 cores per CCX.
https://www.tomshardware.fr/articles/amd-epyc-64-coeurs-zen-2,1-66759.html

 

[Wynix]

Has this thread speculated yet on how many cores, of the presumed 8 core zen variant used in next gen consoles, will have SMT enabled?
My guess is either 2 or 4.

 

[anexanhume]

Tom's hardware France claims 6 to 8 cores per CCX.
https://www.tomshardware.fr/articles/amd-epyc-64-coeurs-zen-2,1-66759.html

Do they have any track record whatsoever?

A single 8-core CCX would be nice for consoles’ sake, but I wonder if it’s the right move for their whole platform.

Has this thread speculated yet on how many cores, of the presumed 8 core zen variant used in next gen consoles, will have SMT enabled?
My guess is either 2 or 4.

Partial SMT? That sounds like a nightmare.

 

[eastmen]

This is why I think it would be foolish for the Xbox X to still play next gen games like some people want.

I think a 2 year or so period of time when the x still gets game is just fine. The few games designed to take advantage of the new cpu can just be exclusive . PS4 got a ton of ps3 ports and the ps3 got a ton of ps2 ports. There will be over laps

 

[Tkumpathenurple]

Partial SMT? That sounds like a nightmare.

Would it be worth it and feasible for the OS though? Maybe one OS core with SMT?

 

[Shifty Geezer]

I think a 2 year or so period of time when the x still gets game is just fine. The few games designed to take advantage of the new cpu can just be exclusive . PS4 got a ton of ps3 ports and the ps3 got a ton of ps2 ports. There will be over laps

The difference here would be the X1X getting ports and the X1 not, which is odd. When PS2 got ports with PS3 being out, PS2 were 100 million units. When PS3 got ports with PS4 out, there were 80 million units. When X2 releases, Xbox One's will number maybe 40 million, whereas X1X's will number maybe 4 million. Let's say 10 million even. Why port down from next-gen to an last gen box which has a useful install base, but then not port to the vast majority of that install base? Makes far more sense to make your next-gen game, make a last-gen port targeting PS4 and XB1, and then up-porting that in the cheapest possible fashion to the mid-gen refreshes. That, or the next-gen engine builds for last gen anyway. Either way, specifically targeting XB1X but not the other consoles of this gen makes little sense to me.

 

[anexanhume]

Would it be worth it and feasible for the OS though? Maybe one OS core with SMT?

1500X and 1300X have the same clocks (normal and turbo) while 1500X has SMT and they are both 65W TDP parts. I’m guessing the SMT overhead isn’t that significant. I’ve seen suggestions it’s a 1-for-1 power for performance trade on some recent designs. I just assume it will be a take it or leave it approach across the board.

 

[eastmen]

The difference here would be the X1X getting ports and the X1 not, which is odd. When PS2 got ports with PS3 being out, PS2 were 100 million units. When PS3 got ports with PS4 out, there were 80 million units. When X2 releases, Xbox One's will number maybe 40 million, whereas X1X's will number maybe 4 million. Let's say 10 million even. Why port down from next-gen to an last gen box which has a useful install base, but then not port to the vast majority of that install base? Makes far more sense to make your next-gen game, make a last-gen port targeting PS4 and XB1, and then up-porting that in the cheapest possible fashion to the mid-gen refreshes. That, or the next-gen engine builds for last gen anyway. Either way, specifically targeting XB1X but not the other consoles of this gen makes little sense to me.

Why wouldn't the xone get ports ? Just target 720p for the xb1 , 1080p or whatever for the xb1x and 4k for the xbox next. For xbox one the hardware is so close to ps4 that there isn't much reason not to port to it. The xbox one x is faster than the ps4 pro so it should still get ports. Unless you think when the ps5 comes out both ps4 systems will stop getting ports ?

 

[Deleted member 13524]

They won't have less than 8 cores I think. Doesn't read well for marketing for the usual console audience.

Naaah the audience would be fine with many TFLOPs and many RAM..

My understanding is that the current CCX arrangement has a specific number of hops for inter-core, inter-CCX communication. Adding two more cores to a CCX would increase that by 1 hop, which isn’t desirable from a latency perspective. I would imagine it’s more beneficial to stay at 4 per CCX and simply work on beefing up the intra-CCX latencies and the infinity fabric for inter-CCX traffic.

AFAIK there are no hops within a CCX. All cores share the same L3 cache for coherency. The hops you mention are between 2 CCX modules within each Zeppelin die, and then between Zeppelin dies on Threadripper and EPYC.



What should be impractical is adding another CCX module in each die as it would triple the Infinity Fabric lanes for inter-CCX communication, or increasing the number of dies in high-end MCM solutions as routing would become an impossible mess to deal with.
Just imagine trying to add just one more die here:

So if AMD wants to scale up the number of cores in Zen2 solutions throughout their line-up, the simpler approach would be to increase the number of cores in each CCX.
And given AMD's announced performance scaling projections for Zen2 and Zen3, they're definitely going to increase general core count.

New Tom's hardware France claims 6 to 8 cores per CCX.

It appears to be more than that. They claim AMD will be making two kinds of Zen2: dies with with 6-core CCX for Ryzen+Threadripper, and dies with 8-core CCX exclusively for EPYC. The latter would result in a 64-core/128-thread CPU.

 

[anexanhume]

Naaah the audience would be fine with many TFLOPs and many RAM..



AFAIK there are no hops within a CCX. All cores share the same L3 cache for coherency. The hops you mention are between 2 CCX modules within each Zeppelin die, and then between Zeppelin dies on Threadripper and EPYC.



What should be impractical is adding another CCX module in each die as it would triple the Infinity Fabric lanes for inter-CCX communication, or increasing the number of dies in high-end MCM solutions as routing would become an impossible mess to deal with.
Just imagine trying to add just one more die here:

So if AMD wants to scale up the number of cores in Zen2 solutions throughout their line-up, the simpler approach would be to increase the number of cores in each CCX.
And given AMD's announced performance scaling projections for Zen2 and Zen3, they're definitely going to increase general core count.



It appears to be more than that. They claim AMD will be making two kinds of Zen2: dies with with 6-core CCX for Ryzen+Threadripper, and dies with 8-core CCX exclusively for EPYC. The latter would result in a 64-core/128-thread CPU.

Im going off the explanations provided in this thread.

 

[Shifty Geezer]

Why wouldn't the xone get ports ? Just target 720p for the xb1 , 1080p or whatever for the xb1x and 4k for the xbox next. For xbox one the hardware is so close to ps4 that there isn't much reason not to port to it. The xbox one x is faster than the ps4 pro so it should still get ports. Unless you think when the ps5 comes out both ps4 systems will stop getting ports ?

I was understanding the idea being XB1X getting ports when no other current-gen consoles would as a suggested possibility. Otherwise why did Xbat single out XB1X as he did?

 

[Deleted member 13524]

Im going off the explanations provided in this thread.

Some users in that thread are assuming each core in the CCX has a "direct connection" to the other cores, which doesn't exist according to any diagram I've seen so far.
Within each CCX the cores are all connected to the same L3 cache pool for coherency. There are no extra buses. What would they be useful for, anyway? Inter-connecting the L2 despite already having shared L3? That doesn't seem to make much sense..

At this amount of cores and L3 cache size, there's no problem with adding more cores to a single larger L3 cache. I think for yield reasons, Intel eventually adopted a ringbus that connected several L3 slices, but that only happened when they went with 12 cores for Ivybridge EP. The 10-core model still uses a single L3 slice.
Eventually, Intel just kept adding L3 slices, and the problem that came up eventually was that each core's access to "far-away" cache slices were increasing in latency.
However, Intel only saw a practical bottleneck with this when their server chips went above 22 cores with Skylake SP, and they had to implement a mesh instead.

So if Intel's results are anything to go by, AMD should be fine with making CCX modules up to 8/10 cores, before they have yield concerns on a single L3 slice. And then they can have multiple L3 slices connected through a ring bus for up to 20 cores in a single CCX.

 

[phoenix_chipset]

They won't have less than 8 cores I think. Doesn't read well for marketing for the usual console audience. I also suspect the first gen PS5 and Xbox to be in the 180-200 wat range.

Hello rrod, ylod

Also i'm sure 2 ccx's wouldn't be a problem for next gen, it doesn't need to be one cluster of 8.

 

[Shifty Geezer]

Hello rrod, ylod

Why?

 

[Allandor]

They won't have less than 8 cores I think. Doesn't read well for marketing for the usual console audience. I also suspect the first gen PS5 and Xbox to be in the 180-200 wat range.

no way, cooling is much to expensive. Look at the xbox one x, it consumes ~150W up to 180W and for that it needs a special cooling system, or the case has to be much bigger with a load cooler to get rid of the heat. You can make this in a premium console, but not in the base console.
150W should be max, more in the direction of ~130W (original base PS4). We really don't need xb360/PS3 noise-levels again.

Why?

Maybe else the hardware would again extremly go up and down with temperatures which leads to micro fractures because of a few pennies they could save with the cheaper material.

 

[Shifty Geezer]

Maybe else the hardware would again extremly go up and down with temperatures which leads to micro fractures because of a few pennies they could save with the cheaper material.

Not going to happen. The savings would be wiped out by the warranty replacements and negative PR. The only reason for RRoD/YLoD was a transition to new materials engineers hadn't learnt to design for. It's a known quantity now and failure rates won't be any worse than any other normal console.