More Nv-30 speculation !!

I have a seriously hard time believing the NV30 will run at 1 GHz... It's just too ridiculous to be true and even if it was the GPU would just be memory bandwidth limited even if it uses 256 bit bus and the fastest DDRII.
 
wouldn't the NV30 core be running at 400 Mhz - 450 Mhz tops?

it's the memory that might be running at 1Ghz (500 Mhz 2x for DDRII) correct? if in fact NV30 is using DDRII that is, and that itself is just an if.
 
It does seem possible that the NV30 would use a 256 bit bus, and the NV31 a 128 bit bus... similar to the 9700 and 9500 lineup. If that's true, we'd probably see the 256 one first followed by the midrange card a month or two later.
 
Well if it's the memory then I must have misread the earlier quote. My mistake then.

On another note, I wish people would stop calling DDR memory by twice its actual speed. 500 MHz DDR still runs at 500 MHz even if it transfers data twice per clock. Calling it 1GHz or 1000 MHz is just misleading.
 
Nagorak said:
Well if it's the memory then I must have misread the earlier quote. My mistake then.

On another note, I wish people would stop calling DDR memory by twice its actual speed. 500 MHz DDR still runs at 500 MHz even if it transfers data twice per clock. Calling it 1GHz or 1000 MHz is just misleading.

Misleading? nVidia PR? NAW, they wouldn't do that, would they? :rolleyes:
 
martrox said:
Misleading? nVidia PR? NAW, they wouldn't do that, would they? :rolleyes:

Well I wasn't trying to place the blame on anyone, although maybe Nvidia's PR is the original culprit for the current naming scheme. I just think the whole thing is kind of ridiculous. I mean, it's almost like saying that one car's engine runs at double the RPM of another's, so instead of going 60 MPH it's really going 120 MPH. ;)
 
Nagorak said:
On another note, I wish people would stop calling DDR memory by twice its actual speed. 500 MHz DDR still runs at 500 MHz even if it transfers data twice per clock. Calling it 1GHz or 1000 MHz is just misleading.

Umh..I don't believe it's misleading cause that single number address the memory data rate.
I'm not an expert in memories part but I believe DDRII memory cells run at half the module clock. 250 Mhz in this case.

ciao,
Marco
 
Why not?
The clocking waveform may be a 250Mhz square wave, but if data is presented at the pin at the rate of 500 MHz, why not call it 500MHz?
 
It does seem possible that the NV30 would use a 256 bit bus, and the NV31 a 128 bit bus... similar to the 9700 and 9500 lineup. If that's true, we'd probably see the 256 one first followed by the midrange card a month or two later.

Now that is exactly what I would expect to see from Nvidia--that's-what I am hoping they are bringingto the market. A highend card in the Nv30 with a 256-bit bus, then shortly after, a midrange card, NV31, with a 128bit bus. perhaps NV31 will have just 4 pipes, while NV30 has 8 pipes.
 
Why not?
The clocking waveform may be a 250Mhz square wave, but if data is presented at the pin at the rate of 500 MHz, why not call it 500MHz?
Because a Hz is a cycle per second, so the term can only be applied to the waveform. The data transfer doesn't cycle.

Also, I'm fairly sure that true 500 MHz memory (SDR) would be faster than 250MHz DDR, so calling that 500MHz is somewhat misleading.
 
Maverick said:
Because a Hz is a cycle per second, so the term can only be applied to the waveform. The data transfer doesn't cycle.
What if all the memory is filled with 0xAAAA or 0x5555?
That datas at each pin change with a 500 Mhz rate.
Also, I'm fairly sure that true 500 MHz memory (SDR) would be faster than 250MHz DDR, so calling that 500MHz is somewhat misleading.
Umh..and I'm fairly sure if there would be a 500 MHz SDR memory then there also would be a 1000 MHz DDR memory, so what?

ciao,
Marco
 
nAo said:
Maverick said:
Because a Hz is a cycle per second, so the term can only be applied to the waveform. The data transfer doesn't cycle.
What if all the memory is filled with 0xAAAA or 0x5555?
That datas at each pin change with a 500 Mhz rate.
That's somewhat artificial, isn't it? I mean, how often does that sort of thing happen? Whereas a clock signal is always a clock signal.

Also, I'm fairly sure that true 500 MHz memory (SDR) would be faster than 250MHz DDR, so calling that 500MHz is somewhat misleading.
Umh..and I'm fairly sure if there would be a 500 MHz SDR memory then there also would be a 1000 MHz DDR memory, so what?

ciao,
Marco
[/quote]

My point is that if you're just going to reduce it to this one measurement, then you'll have a situation where two things can have the same magic number and yet have completely different performance. Heck, GeForce3/4 cards have a 4x32bit crossbar memory controller, so you could just as easily multiply your numbers by 4, and get an even higher (and stupider) number.
The funny thing is, if you kept multiplying all these numbers together, you'd eventually end up with the peak data transfer rate, which actually is a useful number. It wouldn't be measured in MHz though.
 
Considering PCB design logistics, I can see why nVidia might be using DDR-II for reasons other than pure speed. Any chance that they have settled for moderate memory bandwidth (i.e. a 128-bit bus + an "entry-level" DDR-II grade) and are relying heavily on region-based rendering techniques obtained through the 3Dfx/Gigapixel aquisition? I also remember reading about the GP-1's very frugal use of silicon real estate... making a 120million tranny NV30 with a 4x4/8x2 rendering array and "beyond DX9" features possible?

Can anybody totally write off such possibilities at this stage? Do you think that development of the NV30 started too early to consider such technology?

MuFu.
 
Can anybody totally write off such possibilities at this stage? Do you think that development of the NV30 started too early to consider such technology?

Actually (from what I know), NV30's development began just in time for 3dfx's demise, so I wouldn't rule any special gigapixel patents out of the picture just yet...

Seriously, if we think of it for a sec, what do we get here? (based on the rumours of the Inquirer, my personal info about this is not important here ;) ):

128bit bus, 400mhz core, 1ghz ddr2, 8x2 - keep in mind that's it's for the high-end part.

Based on the things I heard about the incredible bandwidth saving techniques nVidia employs in the NV30, I wouldn't be suprised if the 128bit part is true (keep in mind that it's possible the original design was 256bit, but due to the part being too expensive to make, it was cut to 128bit).

The impact this would have on AA & Aniso perfomance is still in question though...
 
Maverik, you're mixing metaphors.

The data on the pins of a DDR device can change at a rate of twice the clock signal. Its a fact, pure and simple: Data is presented at 2x the frequency of the clock. Its still presented at a periodic rate and measured in Hz.

What should it be measured in, if not Hz?
 
Maverick said:
That's somewhat artificial, isn't it? I mean, how often does that sort of thing happen? Whereas a clock signal is always a clock signal.
You misunderstood my point. I meant the same think Russ clearly stated to you. That was just an 'example'.

My point is that if you're just going to reduce it to this one measurement, then you'll have a situation where two things can have the same magic number and yet have completely different performance.
That's why someone invented those acronyms, like SDR, DDR...

Heck, GeForce3/4 cards have a 4x32bit crossbar memory controller, so you could just as easily multiply your numbers by 4, and get an even higher (and stupider) number.
No, you can't. Per pin bandwith is the same.

The funny thing is, if you kept multiplying all these numbers together, you'd eventually end up with the peak data transfer rate, which actually is a useful number. It wouldn't be measured in MHz though.
Quite obvious.

ciao,
Marco
 
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