Low-k?

If i have read it right the NV30 should used low-k but there was some problems apparently.
I was wondering if this process is just avaliable on 13nm tech or could ATI use it on their R350 15nm tech?

And what about copper-interconnects, the NV30 does use it ríght?

Finally does R300 use copper-interconnects?

All on TSMC`s process of course.
 
I read somewhere that the R350 will indeed use TMSC's copper 15 micron process, although it will not use low k. I believe it was the Inquirer, but I'm not sure.
 
so R300 on aluminium and R350 on copper?

I thought the R300 used copper but was´t sure.

Are there any hints on the tech?
 
Could somebody in the know tell/estimate how and how much low-K would help e.g. a R300 chip?

Would it help lower the voltage & heat, or allow faster clock, or both, and approximately how much, or what? :)

I'm just a layman here -- I have understood that adding these new-fangled low-K di-electric materials on the chip helps dampen noise and crosstalk in the chip's internal wiring; so either less voltage is needed for a clean consistent signal, or clock speed can be increased with the "old" voltage. Is this correct?

R300 there as just a hypothetical example, of course. I'm just trying to fathom the practical impact and significance of "low-K" in some easy to digest numbers ;-)

Thanks to all taking the trouble to hazard any answer!
 
It changes the interconnect delays (reduces them) so that the chip can be run "faster-ish".

You can't just say 10% faster, because you still have to contend with switching delays.

So, if you have dense blocks of transistors with short interconnects, it won't help too much. If you have long traces (like memory busses to/from cache and I/O), it will help a lot.

In some places, it may speed the chip up by X%, but in other places, on the same chip, it won't help any.

So the answer is "faster-ish".
 
Thanks, Russ.

Apparently I had it a bit wrong... I confess I still don't quite fathom in what way it reduces the interconnect delays, but I understand the deep technical explanation could go over my non-engineer head anyway ;-)
 
Just for the record, I think TSMC's Low-K is 22% faster interconnect delays compared to their traditional method.
Could be wrong, however.


Uttar
 
Gunhead said:
Thanks, Russ.

Apparently I had it a bit wrong... I confess I still don't quite fathom in what way it reduces the interconnect delays, but I understand the deep technical explanation could go over my non-engineer head anyway ;-)

When a signal needs to switch from high to low, it contends with impedence. Impedence is essentially the same thing as resistance for the non-engineer, but it is more complex (pun not intended). Two lines close to each other can generate cross talk on each other, particularly at high frequencies. You can term this cross talk as impedence (like if one line was trying to go high, the other low--each would be influencing its neighbor to go the opposite way). Low-k insolators help to break this induced coupling and allow the lines to not interact, and reach their required state quicker.
 
Uttar said:
Just for the record, I think TSMC's Low-K is 22% faster interconnect delays compared to their traditional method.
Could be wrong, however.
Uttar

Sounds about right. FSG (flourine doped silicate glass) is used on TSMC's standard 0.13um process, and it has a dielectric constant (Er) of 3.6.

TMSC's low-k process on 0.13um uses Applied Materials "Black Diamond" dielectric, which has an Er of 2.9. Taking the ratio of 2.9/3.6 gives us an ~ 20% reduction in capacitive reactance parasitics associated with the line interconnects.
 
Does we know if R350 uses low-k then?
We know it uses copper and did not ATI said that they lowered the voltage
for R350.

What clockspeeds "seems" reasonable, and do you think that it´s going too have like 10+/-M more transistors(smart used)..?
 
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