The 6GB have an effective bandwidth of 336 GB/s. Just as a hypothetical, if the GPU is accessing this memory more than Microsoft would have expected I guess there is potential to be bandwidth limited. Ideally you want access across all memory channels for full bandwidth, but I guess if you access that particular range too much you'll lower your effective bandwidth. This goes back to how the memory interleaving is set up and I'm by no means an expert.
General Next Generation Rumors and Discussions [Post GDC 2020]
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The 6GB have an effective bandwidth of 336 GB/s. Just as a hypothetical, if the GPU is accessing this memory more than Microsoft would have expected I guess there is potential to be bandwidth limited. Ideally you want access across all memory channels for full bandwidth, but I guess if you access that particular range too much you'll lower your effective bandwidth. This goes back to how the memory interleaving is set up and I'm by no means an expert.
Considering the difficult part of cooling is the thermal density, and 3.5ghz zen2 was said to be the same density as the 2.23ghz GPU, it logically means they didn't create any additional difficulty cooling a 2.23 gpu than the 3.5 zen2, just more material for the total watts (one more heatpipe, maybe an inch more height). MS have a more difficult thermal density to deal with despite a lower GPU clock, because they have a 3.6 zen2 16T without the possibility of downclocking under worst case circumstances or unpredictable circumstances. It depends how high Sony put the individual power limit, but again there are indications there are aiming for something reasonable.
For parametric yield, the layout of the WGPs on a smaller chip means potentially shorter data paths. So it could allow a slightly higher clock if the worst case length of critical high bandwidth data paths is shorter than a layout requiring an additional row of WGPs further away.
For parametric yield, the layout of the WGPs on a smaller chip means potentially shorter data paths. So it could allow a slightly higher clock if the worst case length of critical high bandwidth data paths is shorter than a layout requiring an additional row of WGPs further away.
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Can the GPU reach that slower portion? I thought it was 10 GBs addressable by GPU at full speed, 16 GBs addressed by everything at slower speed.
Yes, it's still a unified memory system. The GPU can access the full range. At least that's how I understand it.
From Digital Foundry:
As per DF article in which they tried to match the CPU and GPU thermals on the chip so that it would be even. Perhaps it was too difficult to approach this with a wider GPU. Seems like tom foolery when I write it this way though.
For the sake of argument, I'll assume the jump to 7nm gave 2x the transistor budget, although it seems like it might have scaled better.
The CPUs are larger. Very rough estimate from pixel-counting a die shot of the PS4 Pro gives 40mm2 or less for two Jaguar modules, while a Zen 2 CCX on its own is about the same--which may explain why the console version may have pared back the amount of L3 cache.
Per Mark Cerny's presentation, a RDNA2 CU's transistor count is 60% larger than that of a PS4 CU, and the other parts of the shader engines and front-end logic have grown significantly. Assuming a 36CU GPU had its area cut in half, and then growing it by 1.6x brings it back to 80% of the Pro's GPU area.
If the Zen 2 area isn't significantly pared back, the area of one CCX alone puts the CPU+GPU area back to where the Pro was, not including the uncore or IO--which it sounds like the PS5 has more of.
If Sony committed to a die area like the Pro, but also including Zen2,RDNA2, a larger integrated controller block, and the bulkier GDDR6 interface, it might have had limited room for growth.
I don't know if the decision for a 256-bit interface could have driven the CU count decision, or the other way around. Microsoft's larger CU array came with a larger DRAM layout that Sony would have needed as well.
Many design targets could have left Sony with the PS5's footprint. Until recently, 7nm costs would have been projected to be higher than they've turned out to be, which could have reduced the target area. A desire to have similar chip manufacturing volume to the PS4 in the face of those projections and likely wafer start competition could have encouraged a smaller chip.
If Sony's decisions 3-4 years ago were a bit off, it could have left the room for additional CUs out.
BC might have created a floor to the CU count that the PS5 couldn't drop below, since it's harder to satisfactorily emulate missing units versus not reporting the existence of extra hardware.
? He is only talking about SMT on/off toggle on XSX here.
So then why bother asking that question in that way? It makes no sense.
Could the Hyperthreading feature included in the X series be the Microsoft's winning ace at the end of gerneration?
^^^
I was so confused by this question.
It's interesting that the explanation from Cerny about BC was to "add the differences" to the GPU so it can operate in that mode. So it seems BC only cost a small die size, and we were also seeing this on half the PS4Pro where one half of the CUs are a smidge bigger.
Maybe, maybe not. There are and will be faster drives then the PS5 will have, it depends on how direct storage/velocity storage will work out there.
Don't worry. I see Doom Eternal pc basically having no load times at all with a fast SSD, while on consoles it loads.... rather slow. What is it, 20x faster on pc, atleast? Thats one of the finest looking games out there now, rather huge levels too, with massive assets and geometry. We dont even have the fastest drives that will be available yet, without even minding Direct Storage/velocity storage features. Yes it is a current gen game, but it goes to show that a swan-song game at the generation can load instantly.
who are these people? Respected news sources or just randos ?
The two halves of the Pro's GPU have different lengths and widths for what looks to be layout purposes. However, small differences in area might also be related to structures or cells that didn't perfectly scale in one dimension to fit the new aspect ratio.
The Pro's CUs were already a custom version with significant amounts of backwards compatibility built-in, since they would be running the same ISA in Pro mode, and that ISA's structure would have BC with the original.
Perhaps it would be worth the small area savings to take make an architectural break inside of the GPU, though I wouldn't know how to see it from die shots.
You only read what you wanted to read (him not talking about SMT on PS5 proving SMT is not on PS5). PS5 has SMT, it's in the officials specs from Sony. Even DF don't doubt about that fact, that should be enough for you.
I've heard an explanation from them that they wasn't endorsing the full statement and it was a mistake to tweet the way they did.
It was one single aspect they had heard about, and everything else i.e. it being delayed, hot being a problem isn't what they heard.
They heard it runs very hot, not that that's even a problem.
Question is not if SMT will be there, it is when and under what conditions it will enabled/disabled, or if devs cant decide and it will always be enabled at that var clock speed.
@Jay
Running very hot, that's already a sign of a 'problem', very hot isn't ideal in any case.
that's not my issue. I know it's supposed to be there. That's why I don't think this interview makes a lot of sense
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He also said 1X runs hot and he doesn't seem to think it's a problem.
Would you consider that a problem? I've not heard of any problems with it?
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