Vysez said:Deano's ppt:
The Sharp End of the Next Generation: PC to PS3
http://www.gdceurope.com/conference/presentations/dean_calver.ppt
Thanks! I was going to install PP but now I don't have to,mistan said:http://www.microsoft.com/downloads/details.aspx?FamilyID=7C404E8E-5513-46C4-AA4F-058A84A37DF1&displaylang=EN
for people w/o powerpoint
:d hope it helps
Dang it! I was too slow.Vysez said:Dean Calver and Deano Cleaver, I hope you guys represent the B3D crew with pride!
Shouldn't that be "don't expect it to work as well as an OOOE processor"An in-order processor can't work around cache stalls that well, Cell does have some help in this regard but don't expect it to work as well an OOOE processor in this regard
Squeak said:DeanoC, don't know if you can correct this but there is a typo in slide 10:
Shouldn't that be "don't expect it to work as well as an OOOE processor"
Nitpicking I know.
Urian said:How can I enter in the industry?
My Skills are:
-I Know C, ObjC, Python, Delphi and RealBasic.
-I have some knowledge of OpenGL from playing with Quake2 Engine and Quake3 Engine but I never created an application from 0 using OpenGL.
-I am studying the career of multimedia (image and sound).
xbdestroya said:Secondly Deano there's been some controversy in the recent past as to how many GFLops the PPE in Cell can push; since your slides back up the E3 218 figure, does that then verify the PPE at 38.8 GFLops?
Which reads as 'Think of Cell as two half-speed cores' and not 'Think of the PPU part of Cell as two half-speed cores'. Though that'll be obvious from the talk the slide might want an edit for clarity.For the current implementation of Cell it's best to think about it as two separate PPUs.
Shifty Geezer said:Something that confused me at first in your PPT was the slide entitled 'PPU Threads'. It reads...
Which reads as 'Think of Cell as two half-speed cores' and not 'Think of the PPU part of Cell as two half-speed cores'. Though that'll be obvious from the talk the slide might want an edit for clarity.
DeanoC said:This is how I work it out...
PPE can dual issue VMX FMADDs
SPE can single issue a SIMD FMADD
1 * 3.2 * 2 +
7 * 3.2 * 1 = 230.4 billion FLOPs
Now I'm not sure if a GFLOP is 1 billion or 2^30 FLOPs so I'll go with a billion...
Thats the maximum flops you can get (I think), its irrelevant if the PPE FPU's could do some work, as you have filled all the instruction slots with VMX instruction so you can't issue any...
I think I'll update the slide as well.