Early-out depth test

I think it goes something like this: Since hardware handles several fragments in parallel, you want to avoid read-modify-write hazards which is easier if you do stuff like stencil and depth testing together and put the logic for it close to the memory controller. The fact that both ops fit in a 32-bit word also might have somehting to do with it but i'm no electrical engineer so I wouldn't know if that gives any advandtage besides alignment.
 
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