Megadrive1988
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How about 8 GB GDDR5 on 256-bit bus and 16 GB HBM2E.
Baseless Next Generation Rumors with no Technical Merits [post E3 2019, pre GDC 2020] [XBSX, PS5]
- Thread starter BRiT
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Yes if PS5 is indeed 13TFs then it must have more bandwidth.
TommyFisher in neogaf has some interesting leak although it is as unreliable as the anonymous PS5 leak in reddit.
I always thought they downclocked it on ps4 because of their power consumption limit allocated to the ram setup as they first desinged it for 4GB.
Digital Foundry seem confident the Xbox sex I'd 12TFlops
https://redirect.viglink.com/?forma...talfoundry-2019-xbox-series-x-reveal-analysis
https://redirect.viglink.com/?forma...talfoundry-2019-xbox-series-x-reveal-analysis
You know in some way I really do appreciate MS' effort and passion to cater for the hardcore, power hunger fan base. They have gone out of their way to design a butt ugly but extremely powerful console for practicality and performance, in the end this would net the end users more per buck. It's a shame most of their 1st party games don't interest me much but looks like there's a good chance XSX would become my go to for the multiplatform again just like 1X does. Sony better start the hype boat soon as MS is really starting to steal the thunder.
It's too generic and boring looking for me but hey, whatever as long as there's 12 TF of power in it.
Are mixed density chips doable? Can BW access be uniform?
For the XSX, I don't see how 16GB on a 256-bit bus can provide sufficient BW. Even with 18 Gbps modules it may not be enough as you're adding another ~20%+ TF over the 5700XT and a 8-core CPU. So I think the bus has to be higher.
For a 320-bit bus to get the rumored 16 GB of ram, you need a mixture of 1 and 2 GB chips. Wouldn't you see a non-uniform speed across the entire memory (full BW for the first 10 GB and 60% for the remaining 6 GB)? It's something that has bothered me since the reveal video back at E3.
For the XSX, I don't see how 16GB on a 256-bit bus can provide sufficient BW. Even with 18 Gbps modules it may not be enough as you're adding another ~20%+ TF over the 5700XT and a 8-core CPU. So I think the bus has to be higher.
For a 320-bit bus to get the rumored 16 GB of ram, you need a mixture of 1 and 2 GB chips. Wouldn't you see a non-uniform speed across the entire memory (full BW for the first 10 GB and 60% for the remaining 6 GB)? It's something that has bothered me since the reveal video back at E3.
It's a bit sneaky/forgotten, but main memory in a desktop for certain motherboards handling mixed DIMMs.
Anyways, it's been done before with the GTX 55x (128+64-bit*), and bandwidth was fine up to the common amount of memory on all the chips**. Things probably get awkward for the addressable memory beyond that on the higher capacity chips, which kind of makes sense if you think about the memory controllers connected to certain chips. I'd shove the OS on the fewer higher capacity chips in that case.
* 4x128MB +2x256MB
**4x128MB + 2x (128MB + 128MB)
Then there's the weird stuff that happened with the GTX 970 (3.5GB + 0.5GB).
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snc
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yes, full speed read for 10gb and 60% for last 6
Looks like journalist say the PS5 is in the same range of power maybe a little less, maybe the same or a little more. If they don't care of the noise like with og PS4 and first PS4 Pro, I can't imagine the noise.
EDIT: Or maybe I can
snc
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Becasue 16 gb is cheaper than 20 I guess
With a 320-bit but, it would be 4 1 GB chips and 6 2 GB chips. It's only 4 more chips, seems like an incremental costs.
With this setup, it would be 10 GB of RAM with full BW and 6 GB at 60% BW. The rumored split was 12 for games and 4 for the OS on Anaconda. I would assume the OS would get a portion of the region that the occupies the lower BW addresses. That would leave the remaining 2GB of the games region at 60% BW. Maybe it's would have some special uses for the games, but not be part of the general pool.
With this setup, it would be 10 GB of RAM with full BW and 6 GB at 60% BW. The rumored split was 12 for games and 4 for the OS on Anaconda. I would assume the OS would get a portion of the region that the occupies the lower BW addresses. That would leave the remaining 2GB of the games region at 60% BW. Maybe it's would have some special uses for the games, but not be part of the general pool.
D
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Honestly it looks like memory paging magic is HBCC.
Rumor was 13GB vs 3 GB.
Agreed that would be an obvious baseline. I guess just thinking out loud; if HBCC doesn't care about symmetrical sources; then HBCC would be responsible for handling different memory chips?
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