ATI MSAA/ eDRAM module patent for R500/ Xenon?

[j^aws]

Video graphics system that includes custom memory and supports anti-aliasing and method therefor

Abstract

A method and apparatus for supporting anti-aliasing oversampling in a video graphics system that utilizes a custom memory for storage of the frame buffer is presented. The custom memory includes a memory array that stores the frame buffer as well as a data path that performs at least a portion of the blending operations associated with pixel fragments generated by a graphics processor. The fragments produced by a graphics processor are oversampled fragments such that each fragment may include a plurality of samples. If the sample set for a particular pixel location can be compressed, the compressed sample set is stored within the frame buffer of the custom memory circuit. However, if such compression is not possible, pointer information is stored within the frame buffer on the custom memory, and a sample memory controller included on the graphics processor maintains a complete sample set for the pixel location within a sample memory. When the sample memory controller maintains a complete sample set for a pixel location, the frame buffer stores a pointer corresponding to the location of the sample set.
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The present invention provides a method and apparatus for performing video graphics anti-aliasing in a system that utilizes a custom memory. The custom memory includes a memory array, which may be a DRAM memory array, that stores the frame buffer for the system. Also included within the custom memory is a portion of the blending circuitry used to blend newly generated pixel fragments with stored pixel data. In cases where the blending performed within the DRAM results in data that can be reduced to a compressed sample set, further blending operations are not required. However, if the results of the first pass blending cannot be compressed, the appropriate information is provided back to the graphics processor such that the complete sample set for the particular pixel location can be stored within a sample memory for subsequent use. As such, the present invention provides a lossless compression technique that supports an over-sampled video graphics-processing environment. Such oversampling can help reduce undesirable aberrations within displayed images.
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Video graphics system that includes custom memory and supports anti-aliasing and method therefor


They have a separate DRAM module with custom logic like the Xenon 'leak' and transfer 'compressed' sampled pixels to this framebuffer.

This would explain the odd 10 MB eDRAM of the Xenon leak as ~7.4 MB is enough for 720p (with 4xMSAA for free) and the rest stores compression/ pointer info...

The inventor is Stephen Morein who was one of the dudes that did the R500 patent I posted here,

http://www.beyond3d.com/forum/viewtopic.php?t=21708

 

[flick556]

Interesting read.

Is this only multisampling? ; I only briefly read this but it appears to oversample all pixels not just the edges.

 

[Urian]

It remembers to me the L2 cache of the PentiumII.

 

[AzBat]

The inventor is Stephen Morein who was one of the dudes that did the R500 patent I posted here,

What?! I know Steve. That's freaky wierd. When I worked for JPA he came to work for us during a time he was between jobs. Now that I think about it I think he was working under contract for ATI. That's really cool. I haven't talked to him in at least 4 years. If you're reading Steve, congrats on the work.

Tommy McClain

 

[Jawed]

Steve has lots of patents...

http://patft.uspto.gov/netacgi/nph-...l=50&Query=in/Morein-Stephen-L&d=ptxt

and applications:

http://appft1.uspto.gov/netacgi/nph...l=50&Query=in/Morein-Stephen-L&d=PG01

I think it's worth noting that the patent under discussion in this thread was filed back in 2000...

Jawed

 

[jvd]

isn't that around the time that the r400 went into developement ? around 2001 i would tink if it was originaly supposed to come out in 2003/4

 

[Ooh-videogames]

Steve has lots of patents...

http://patft.uspto.gov/netacgi/nph-...l=50&Query=in/Morein-Stephen-L&d=ptxt

and applications:

http://appft1.uspto.gov/netacgi/nph...l=50&Query=in/Morein-Stephen-L&d=PG01

I think it's worth noting that the patent under discussion in this thread was filed back in 2000...

Jawed

He has alot of patents with Broadcom that involve graphics processing, are they trying to get in the GPU industry.

They're providing Nintendo with Wifi chips.

 

[AlNom]

Does this patent affect ATi's "temporal" AA?


The AA algorithms are programmable for R3xx+ right? So would this tech here apply to anything other than the regular MSAA?

(Am I asking nonsense?)

 

[one]

I think it's worth noting that the patent under discussion in this thread was filed back in 2000...

GameCube?

 

[Inane_Dork]

I think it's worth noting that the patent under discussion in this thread was filed back in 2000...

GameCube?

Given how the GC's cache is just big enough for a 640x480 frame, I kinda doubt it.

But on the other hand, I kinda doubt it was intended for a specific console back then. I would guess ATi to forsee that embedded cache would be a strong possibility for future console hardware so they started investing in it.

 

[one]

A presentation about Radeon HyperZ in 2000 by Steve Morein

 

[j^aws]

Interesting read.

Is this only multisampling? ; I only briefly read this but it appears to oversample all pixels not just the edges.

The technique is general oversampling-downsampling, compression-decompression to save bandwidth and memory requirements of the frame buffer.

The MSAA would be a specific implementation I guess in reference to the Xenon 'leak',

http://www.beyond3d.com/forum/viewtopic.php?p=495971#495971

Does this patent affect ATi's "temporal" AA?


The AA algorithms are programmable for R3xx+ right? So would this tech here apply to anything other than the regular MSAA?

(Am I asking nonsense?)

See above.

If they could use alternating samples with the compression/decompression algorithms then maybe...

 

[j^aws]

I think it's worth noting that the patent under discussion in this thread was filed back in 2000...

GameCube?

Given how the GC's cache is just big enough for a 640x480 frame, I kinda doubt it.

But on the other hand, I kinda doubt it was intended for a specific console back then. I would guess ATi to forsee that embedded cache would be a strong possibility for future console hardware so they started investing in it.

The fact that the patent is assigned to ATI, including the above linked R500 patent, it doesn't preclude Nintendo from using any of this tech for Revolutions Hollywood GPU...

 

[AlNom]

HyperZ presentation:

whoa. So what are the memory bandwidth needs these days? Have the "cases" changed? (I ask because going by the common case of 16B/pixel, it looks like the R420 needs 128GB/s memory bandwidth )

 

[Geo]

Where's Wavey on this one? I want to know what it means that the same company, main guy, and publish date (March 29) as the unified pipeline one, and he didn't find this one at the same time as that one? I find that non-credible for the dedicated patent hound he's proven himself to be. So it must be something else.

Doesn't find this one interesting?

 

[tEd]

Where's Wavey on this one? I want to know what it means that the same company, main guy, and publish date (March 29) as the unified pipeline one, and he didn't find this one at the same time as that one? I find that non-credible for the dedicated patent hound he's proven himself to be. So it must be something else.

Doesn't find this one interesting?

It is not really that interesting considering it's just an extension to his earlier AA patents.If you read some of his earlier patent dealing with AA you will see that they are very similar to this one. It doesn't really describe what kind of AA or what quality the AA will have just how is dealing with seperate memorys and compression. We pretty much knew that the r500 will do MSAA even though this particular patent isn't specific to MSAA afaict it could also be SSAA.I think it's also safe to assume that the AA quality will be at least what we know from the r300 architecture.
The main difference might be that it needs a less memory footprint compared to r300 but that would something you could have expect to be improved on a new architecture.
Overall the most interesting thing what you could read out of it is that it's another hint that r500 will have some amount of special memory may as well be EDRAM(i don't think it's eDRAM) as in the leaked diagram mentioned.

I personally have read this patent some time before it was posted here and i think there are some others which also refer to the r500 like the gradient noise engine with shared memory which i think is more interesting overall.

 

[Jawed]

Where's Wavey on this one? I want to know what it means that the same company, main guy, and publish date (March 29) as the unified pipeline one, and he didn't find this one at the same time as that one? I find that non-credible for the dedicated patent hound he's proven himself to be. So it must be something else.

Doesn't find this one interesting?

Jaws found both, as far as I can tell.

Jawed

 

[Megadrive1988]

Jaws - Faf - Panajev - DemoCoder - DeanoC and others:

would it be correct to say that Xenon / Xbox360 sort of
has 2 graphics chips?

I do not mean two full GPUs / VPUs, but 1 main GPU / VPU
(R500 or R5xx) and then this seperate module with embedded DRAM
and some circuitry for final processing, FSAA, etc. ?


also, what is the likelyhood that there will be more than 10 MB of eDRAM
(or EDRAM) ?

 

[The GameMaster]

This certainly sounds like a possibility where instead of having one full fledged GPU and some embedded DRAM you would have a full fledged GPU and a seperate graphics related chip that would contain memory and logic that would handle frame buffer, FSAA, and so forth. It would make sense as this would keep costs down and would provide FSAA with no performance degradation, which has been a goal of graphics chip makers for a while now. This would also keep the transistor count of the chip down and this will help reduce die size and increase yeilds. Assuming that the R500 is roughly 300 million transistors, having 10MB of eDRAM that would add another ~300 million transistors... keep in mind though memory transistors compress very well and do not take up as much space as logic. There are a lot of advantages to this implementation in terms of performance, but this may add a little bit of extra manufacturing cost.

Not totally sure if something like this is going to be in the XBox2, but it is certainly an interesting way of dealing with the performance penalities that FSAA brings. As for the likelyhood of having more than 10MB of eDRAM, with this that does open up the possibility of more, but in the XBox2's scenerio it really depends on what they want to do. 10MB is plenty for a 720p framebuffer under normal circumstances, though they may need more if they want to do double/triple buffering or special frame buffer effects.

The GameMaster...

 

[neliz]

I thought nv's PS3 gpu also had a "L2" cache and that the size was also considerable.
But it was ment more for instruction and texture caching...