AMD: Speculation, Rumors, and Discussion (Archive)

Discussion in 'Architecture and Products' started by iMacmatician, Mar 30, 2015.

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  1. Arzachel

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    Perspective correction has been implemented in iRacing for many years and it certainly doesn't require Pascal.
     
  2. Having "no GTX 1080 contender" shouldn't be news to anyone since AMD has been rather specific about the performance brackets of these two new chips, and none of them was designed to replace Fiji.

    If there are in fact no new graphics cards to show at Computex, then it's really bad news. The only "good" scenario where that happens is if all the new chips have been snatched by laptop makers, but that's a bit unlikely especially for Polaris 10.
     
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  3. Razor1

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    Well the original article had a bit more information, where they state AMD hasn't told partners anything yet about a high end contender, and they are getting antsy about. So its nothing really about Polaris, just what is coming after that. Doesn't really have to be bad news at all.
     
  4. CSI PC

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    It does if you want to limit performance loss (so comes back to my context of focus on optimising), they only added the single pass render for multiple displays/points of view now to Pascal HW and SW.
    See the presentation where they go into detail about Simultaneous Projection and also the single pass stereo render in VR (context multiple POV).
    Also just checking the iRacing does not seem to be as perfect in terms of complete correction-alignment with angle of the monitors.
    Cheers
     
    #1504 CSI PC, May 11, 2016
    Last edited: May 11, 2016
  5. No, but I'd argue that there is "designed for 4K gaming", which means that above all the chip should have sufficient texture and pixel fillrate to render at 4K with sufficient framerate.
    Compute demands seem like a moving goal post as years go by, but TMU and ROP count have been rather consistent with render resolutions that AIBs market their GPUs for.

    That said, it's unlikely that AMD or nVidia will be releasing a GPU with 32 ROPs and claim it's made to play 4K content, or come out with a GPU with 64 ROPs and claim it's the perfect choice for 1080p.
     
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  6. CarstenS

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    That's just a moving goal post as compute. Pixelwise, 500 MPIx/s are sufficient for 3840×2160@60Hz. Textures, well, multiply by the number of layers you aim for. Both numbers are ridiculously low and only go to show that you cannot really design for „resolution“. More is always better.
     
  7. Esrever

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    Why do you expect the new GCN to have less performance/mm^2 than previous gen? Just using your example shows that those hawaii is about 10% more area efficient than tahiti and is almost exactly the same perf/transistor as each other. A better look would be looking at the 6970 to 7870 which are both about the same transistor count while going from flagship down to mid range with a die shrink and the 7870 is more transistor efficient than the 6970 because it clocks higher. I am just going to say, transistors are the basis for what can be done and transistor density is a good measurement of expected performance when nothing else is there. It's the whole idea behind Moore's Law. If you expect a nearly 8b transistor GPU to perform no better than a 6.2b transistor one, then you are probably wrong unless AMD royally screws up.
     
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  8. It will definitely have better performance per mm^2. It just may not have the over 2x performance/mm^2 that you're claiming because what AMD is promising is better performance-per-watt, and implementing power-saving features isn't exactly free on transistor count (and subsequently die area).
     
  9. Esrever

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    That is generally offset by even a slight clock increase available due to the new node, pretty much exactly the case of the 6970 vs 7870. I expect the perf/transistor to be within +-15%, meaning fury x +-15%. Probably fall closer to the top than the bottom if they get even a 10% clock bonus from the new node.
     
  10. SimBy

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  11. 3dilettante

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    I can see some surprise to the extent that the upclock was taken to, but not that Nvidia wouldn't have an eye on using clock speed as an additional knob for optimizing their positioning. They used the unleashed non-reference editions of the later products of the 28nm generation to great effect to garner good numbers and negate some of AMD's attempt at garnering positive mindshare.
    There was obvious room to toy with speed at 28nm and AMD internally should have been cognizant of how consistently Nvidia's base clock and consistently held boost clocks compared to the "up to" of GCN.
    Nvidia has been streamlining hardware and doing things to reduce known power and complexity sources.

    The 980 itself pushed clocks with a more constrained die area budget relative to the later Ti, so it's not ancient precedent. The 1080 does seem to trade away the power efficiency that could be had at the same performance and does regress in power/mm2, but that's a valid option when nowhere near the power and die size pileup that GPUs had at the top end due to no 20nm.

    Aiming for power efficiency without aiming to really push clocks is also valid, particularly for mobile. The risk is that if the speed knob cannot be turned that much, it does leave it more of a mm2 game where AMD apparently did not take an aggressive stance.
     
  12. Here's a thought about Vega: AMD only confirmed there would be 2 Vega chips but it didn't comment on their performance other than they'd have HBM2.

    Granted, one should be the bigger chip / halo product with up to 16GB HBM2.
    We've been assuming that both will be placed above Polaris 10, but what if it isn't?

    What if the second Vega (let's call it the Vega 11) is actually a low-power chip designed to bring HBM2 to laptops and further increase the standard set by Polaris 11's efficiency?

    I'm thinking a chip whose performance would be between Polaris 11 and Polaris 10. If P11's performance is equivalent to a Pitcairn and P10 to Hawaii, then Vega 11 could have Tonga's performance and Polaris 11's power consumption.
    Carrying only one stack of HBM2 for 4GB at 256GB/s, they could make a "premium low-power" chip that would fit into all high-margin products like macbook pros, Surface Book, slim laptop workstations, etc.
     
    #1512 Deleted member 13524, May 11, 2016
    Last edited by a moderator: May 12, 2016
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  13. Razor1

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    I was under the assumption Vega 11 was the bigger chip, but yeah that is also a possibility.
     
  14. Jawed

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    I think it's prolly simplest to believe that P100 is seriously late, so there's going to be an awful lot of HBM2 swimming around. AMD will happily take up that supply, since NVidia has nothing set up for consumer HBM2 usage. At a guess, the volume of P100 sold in the next 18 months prolly amounts to about 1 month's HBM2 production.
     
  15. Razor1

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    Hmm nV is getting HBM 2 from Samsung, HBM 2 by Hynix is going into mass production in Q3 of this year, that fits with if AMD pushed up launch of Vega to Oct.

    We have seen initial launches of tesla products eat up a quite a bit of supply or limit supply by corporations. We know new companies are more interested in Pascal than just laboratories and what not. Google, Amazon, and a few others are very interested in Pascal, to accommodate that much more volume, I would presume it would take time, but once those are done, supply strain would come back down to normal. All of these sales are large margin sales, why wouldn't nV take this into consideration if there is no direct competition to that product in the gaming side?
     
  16. 3dilettante

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    What size would the big Vega be in this scenario?
    There appears to be a very strong clustering at Polaris 10 and below in terms of the rough positioning of "bigness".
     
  17. If Polaris 10 is 232mm, I'd put big Vega at 300 to 350mm^2 at most.

    First-gen 28nm biggest GCN was Tahiti at 350mm^2. First-gen 40nm biggest Terascale 2 was Cypress at 334mm^2. GP104 is almost 300mm^2.

    If Polaris 11 is close to 100mm^2, Small Vega could be 150-180mm^2.
     
    #1517 Deleted member 13524, May 11, 2016
    Last edited by a moderator: May 11, 2016
  18. Pressure

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    Or just Apple :p
     
  19. CSI PC

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    So you think P100 was just a fake launch and they will not supply their close HPC/supercomputer/research clients this year?
    I guess the serious professional supercomputer/hpc close clients of NVIDIA are rather peeved with the orders they are putting in.
    We hear the same about GP104 even still from semi-accurate and bits&chips....
    I think we will agree to disagree, the Samsung HBM2 is order production with NVIDIA IMO and AMD is tied to SK Hynix.
    We keep hearing how NVIDIA is not launching any products, yet here we are with reviewers getting the GP104 dies.
    If some feel AMD can manufacturer a large die Vega but yet not release a small die at same time as NVIDIA, what makes you think the logic should be different for NVIDIA who have announced and shown to close clients the GP100?
    Cheers
     
    #1519 CSI PC, May 11, 2016
    Last edited: May 11, 2016
  20. Jawed

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    Obviously P100 was a fake launch. Nothing was shown running.
     
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