AMD: Sea Islands R1100 (8*** series) Speculation/ Rumour Thread
I'd like to see a clock to clock comparison of the 8700m series vs 7600m series... It's 50% faster... but at 50% faster clock speed. If you drop the T unit, they really have the same amount of shaders, so it's a pretty interesting comparison. I'm sure there's a lot of the benefit coming from GCN, as has been shown in the past with a downclocked 7770 vs 5770, but it seems they've put most of extra power/thermal envelope made available from the process shrink towards clock speeds. This makes a lot of sense on a mobile device, really. No one sane would overclock them, so having the smallest die running the highest clocks makes sense - assuming close to 1:1 frequency to power scaling, which will only last so far (900MHz-1GHz seems to be pretty typical for 28nm in that regard). The problem I can see if that OEM's are free to adjust the clocks within a pretty wild range... a winder instead of faster chip here would have ensured consumers more often get the performance they're expecting. At the lower end of the clock range this chip could actually under-perform a few 7600m chips, especially the 7690m XT, which at 725MHz is much more of a match.
I guess the other option they had was to release a 512SP part at 700-800MHz, for mobile, I think higher clock speeds is the better option - the downside of course being the floating clocks as mentioned. It makes me wonder why they are aiming for 512SP's on their first GCN APU given the memory bottleneck.
I guess the other option they had was to release a 512SP part at 700-800MHz, for mobile, I think higher clock speeds is the better option - the downside of course being the floating clocks as mentioned. It makes me wonder why they are aiming for 512SP's on their first GCN APU given the memory bottleneck.
I've just found some more info about how a video card (drivers) relate to load times in games:
http://news.bigdownload.com/2010/04...rove-battlefield-bad-company-2-level-load-ti/
http://forum.beyond3d.com/showpost.php?p=1396907&postcount=20
http://forum.beyond3d.com/showpost.php?p=1397817&postcount=22
In a nutshell will the 8000 series improve on load times or will this be a continuation of improvements from the driver?
Doesn't the T unit works too with the others? My understanding was that it was capable of doing both normal work and some other, more complex stuff.
Well, it also has only 25% more BW, so..
Well, it seems to me a really awesome chip, although the naming is a bit tricky, me thinks.
That would be an even more interesting comparison now the performance team have had at GCN for well in excess of a year.
The TDP ranges for particular segments and price points in the notebook market are fairly well defined and the products, and their respective speeds, are specc'ed to those TDP's.
Not so much these days, with older DX9 titles, yes. For an easy comparison just look at Cayman vs Cypress.
And yes, the bandwidth increase only being 25% is quite a testament to GCN, similar to the 7770 using slower memory than the 5770 but beating it quite easily.
I was thinking about that when I posted, I'd like to see a modern comparison with the latest drivers.
It did come away from the TechReport review thinking this would end up the case due to the similar TDP of the two compared chips. I guess we'll have to wait and see as to what ends up in real world laptops come CES. It's more the lower end chips I'm worried about, but possibly lowering the clock speed won't have a big effect if paired with DDR3.
The clock being even higher than on some desktop parts (hd 7750) was quite a surprise imho. Though even if it ends up a bit lower in shipping products I guess it should still do ok.
I think even lower clocked and with ddr3 should do quite fine for low-end.
The parts I'm _really_ worried about are those with 64bit ddr3 though, and until I've seen some benchmarks I can't be convinced they won't be useless.
caveman-jim
Regular
these are supposed to be G5 parts (albeit with DDR3 option). from a hsa pov I'm glad to see G5 specced.
AMD also sent TechReport an Intel based motherboard to benchmark this GPU! Whoever came up with that idea likes to live dangerously.
I think they only sent the PCIe riser board, Tom's used a different mobo.
The thing I really dont like about these parts is the lack of dual graphics compatibility and the disabled VCE (well, it's functionally disabled on everything else too - nothing works). Catalyst 10.2 AMD told the world, we can crossfire anything now, we're doing it for APU's, and boom - VLIW4 and VLIW5 with trinity and 6000m dGPU. GCN? No, 'too difficult', says AMD. 2 years ago AMD said 'technically we could crossfire a R300 and a R770 if we wanted to do'. It's a marketing decision, protect the new apu parts.
iMacmatician
Regular
Wouldn't there be lots of DDR3 versions of those parts in any case, especially if they end up in quite low priced computers?
Nope. The whole rig. Check the comments.
VCE has been enabled for many months for the HD 7000 series. This new part does not contain a VCE block.
Except dual graphics is a part of the strategy going forward. A number of years back it was easier to Crossfire different parts, however as graphics (hardware and software) have evolved seemingly relatively minor precision differences from one architecture to the next can have can produce fairly jarring differences when Crossfired. Texure/Pixel is one things (and relatively managable), but Vertex is quite another.
Is there any chance given the fact that AMD is working on consoles which are rumoured to have stacked memory that the next generation AMD GPU hardware will also sport this technology? It seems quite an unusual break from tradition over the past few years for the HD 79xx range to sport such a wide bus with so much graphics memory and in following this trend we could end up with an even wider bus and the first implementation of DDR4 on graphics cards? Eyefinity is very important for the high end AMD cards and other than a simple refresh of the GCN architecture what else could they bring to the table which is interesting/potentially groundbreaking than a new memory architecture?
I doubt that we will see DDR4 on anything but low end GPUs. Why? Because it's still slower than GDDR5 (unless DDR4 is something like 5x faster than DDR3, which I really doubt).
I suspect the advantage of GDDR is mostly the distance between the GPU and the memory modules is very short, around 1/2 - 1 inch, whereas with DDR you have the long distance between the CPU and memory, perhaps 2-3 inches. This has signal strength implications.
I somewhat question the use of stacked memory in high end cards since with modern deferred renderers, you end up with very large g-buffers, unlikely to fit in the stacked memory. This would limit its utility except as a hardware managed L3 cache. What sort of bandwidth is a stacked memory unit likely to have? Since GPUs are fairly latency tolerant, then unless it had high bandwidth, north of 300 GB/s or so, what's the point?
I suspect the advantage of GDDR is mostly the distance between the GPU and the memory modules is very short, around 1/2 - 1 inch, whereas with DDR you have the long distance between the CPU and memory, perhaps 2-3 inches. This has signal strength implications.
I somewhat question the use of stacked memory in high end cards since with modern deferred renderers, you end up with very large g-buffers, unlikely to fit in the stacked memory. This would limit its utility except as a hardware managed L3 cache. What sort of bandwidth is a stacked memory unit likely to have? Since GPUs are fairly latency tolerant, then unless it had high bandwidth, north of 300 GB/s or so, what's the point?
There could be a reason in the driver because of totally different code paths.
caveman-jim
Regular
It doesn't do anything, no apps use it that I can find. If you can point to publicly available apps I'll check it out, but as it stands right now there are no VCE enabled applications.
Thanks for the info!
If I put my tinfoil hat on, I extrapolate from that the target systems already have VCE or equivalent functionality in them so the inclusion in a dGPU is pointless, so save the space and transistor count and thermal budget.
Interesting, I had not considered precision differences... thanks. It does make the decision to make Trinty with VLIW4 seem rather... short sighted. If you've got to hard cutover to GCN, VLIW4 was the best choice for the 6 series top to bottom; it's not like Llano's VLIW5 couldn't crossfire with NI-40 VLIW4 GPU's.
I don't think this has anything to do with it, now I think it's less marketing and more resource constrained. Dave has above provided the first somewhat technical reason for not permitting it, and it is good on the surface but I'll have to slowly, oh so very painfully, think about it.
Ugh, what? It's a perfectly capable ALU irrespective of API...
to get this discussion booming again, im going to remind everyone of the awesomeness that was rv770.
they almost doubled the performance from the previous gen without a shrink, it was on a fairly new arch, much like the current gen.
so what are the odds well see something like that this go around, its pretty amazing what theyve done with drivers alone the past few weeks so what is possible with new silicon...
anyway theyre in a much better position this time anyway, 50% faster seems doable, heres hoping.
they almost doubled the performance from the previous gen without a shrink, it was on a fairly new arch, much like the current gen.
so what are the odds well see something like that this go around, its pretty amazing what theyve done with drivers alone the past few weeks so what is possible with new silicon...
anyway theyre in a much better position this time anyway, 50% faster seems doable, heres hoping.
It's capable, but supposedly more modern games make very little use of it. This isn't because of the API per se, I just mentioned that as a reference for when it was used much more.
That was a fairly special case in that the previous generation was a simple shrink and fix - in regards to cost and power efficiency - of the generation it succeeded. So performance remained stagnate, then, they used the shrink to once again increase the die size while at the same time further increasing efficiency.
This time around we have very little room to increase the die size while still having cost and power effective parts, so it all comes down to efficiency. We still don't seem to know if they are improving GCN enough to warrant calling it any further revision of itself... these chips could just end up being 25% bigger and clocked a little higher.
If we were to ignore Tahiti, which sacrifices some performance/mm2 for extra GPGPU functionality and for being the first product on TSMC's 28nm process:
Pitcairn is 212mm2, not much higher than RV670's 192mm2.
Cape Verde is 123mm2, slightly lower than RV635's 132mm2.
And TSMC's 28nm process is now more mature and presumably cheaper than it was 12 months ago.
Power consumption is still a conundrum however, and I too do not expect any miracles from Sea Islands. But die size is not necessarily a limiting factor.
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