AMD: R9xx Speculation

Well, you've got to hand it to AMD, their new codenaming scheme is very successful at confusing the hell out of everyone.
 
DavidGraham said:
80187435.jpg
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So now we have rumors about post launch rebranding as well. Before the actual launch itself.

:cool:
 
Alexko said:
Well, you've got to hand it to AMD, their new codenaming scheme is very successful at confusing the hell out of everyone.
Click to expand...
Yeah, I just wonder if they spread all that confusion "on purpose" - or if they actually arrived at a point were even AMD's own marketing people will have to stop and consult their latest memos when asked to finally unveil the codenames of their new GPUs ;)

Thanks for all your feedback, anyway.

As long as that new HD6870 will actually perform convincingly, I won't complain about confusing codenames and shadowy desgin decisions :LOL:
 
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Mindfury said:
http://www.chiphell.com/thread-121067-1-1.html

Cayman has a 256bit bus,not 384bit
Click to expand...

So ... either that Napleon guy still uses the "old" 32nm codename scheme (I made my personal stand on this matter clear enough), or the codename leaks in that beta driver are false.

If "Cayman" (whatever chip it stands for here) will trade under the name of 6970, Antilles most certainly won't be that chip x2 ...

The only real question left for me now (apart from all the codename-confusion) is whether "Cayman" (or better: the chip Napoleon refers to as such) will actually be a 400mm2++ 40nm monster-chip (possibly shipping at the end of this year) or a 28nm sweet-spot refresh launching 2011 ...

Or maybe ... AMD has BOTH options in the pipeline? :oops:
 
Shared TMUs?

These two patent documents seem to imply the possibility of a pair of quad TMUs sharing a single L1 and working either separately or jointly to produce texture results:

Shader Complex with Distributed Level One Cache System and Centralized Level Two Cache:

http://v3.espacenet.com/publication...=A1&FT=D&date=20100610&DB=EPODOC&locale=en_gb

Dynamically Configurable Bilinear Filtering System:

http://v3.espacenet.com/publication...=A1&FT=D&date=20091126&DB=EPODOC&locale=en_gb

Figure 3 in the first document shows two separate Shader Pipe Texture Filter units sharing L1 caches. (There's also talk of writes from L1 to L2, but that's a bit vague generally as far as I can tell.)

Figure 4 in the second document shows two Bilinear Interpolators A and B which can work either independently or ganged (for floating point texture filtering).

My first thought is that this would lead to two SIMDs sharing a single texture unit that consists of two of these bilinear interpolators. For normal 8-bit texturing the two SIMDs would have dedicated access to a single bilinear interpolator. But for high-precision floating point the two SIMDs would take it in turns.

An advantage of this layout is a reduction in the count of L1 caches. In my view one of the key problems is the count of L1s all trying to access the set of L2s. Any way to reduce the count of L1s should be seen as a win.

Of course it might turn out that two SIMDs aren't sharing, as I'm suggesting. There's a fair few other interpretations...
 
no-X said:
28nm model could be a back-up plan...
Click to expand...
Yeah, it could be ... but the one reason rendering a Q4 2010 6970-spec Cayman@40nm improbable to me is that it would make any 6990 two-chip solution instantly obsolete:

Consumer's perspective: Why buy a multi-GPU card (6990) which is only slightly faster than the next best single GPU card (6870) available around the same time?

AMD's / manufactures perspective: Why produce a multi-GPU card that costs a lot more to make when you can achieve almost similar performance and better margins with a one-chip solution available around the same time frame?

The only feasibly answer to me is that the 6990 multi-GPU card will actually precede the 6970 single-GPU card by a few months, maybe even half a year ...

Cayman (or better: original 32nm-high-end design ) @ 28m to attack in H1 2011 and Barts (or better: original 32nm-high-midrange design) @40nm to reign supreme in Q4 2010 seems more and more probable to me.
 
I am skeptical of a 69x0 launching before a 68xx, simply because you need a lot of 68xx dies to bin the low leakage parts to put together a 69x0.
 
rpg.314 said:
I am skeptical of a 69x0 launching before a 68xx, simply because you need a lot of 68xx dies to bin the low leakage parts to put together a 69x0.
Click to expand...

It does not make sense to launch a "fastest card" only once, when you can do it two or three times.
 
neliz said:
It does not make sense to launch a "fastest card" only once, when you can do it two or three times.
Click to expand...
So you imply something like:


(a) =======================================
6870 in October 2010 (single 40nm GPU)

6990 in Nov/Dez 2010 (dual 40nm GPU)

6970 in H1 2011 (single 28nm GPU)
==========================================

or

(b) ========================================
6870 in October 2010 (single 40nm GPU)

6970 in November 2010 (singe, huge 40nm GPU)

6990 in Dezember 2010 / Q1 2011 (dual 40nm GPU)

...

7xxx 28nm refresh in later 2011
==========================================


:?:
 
I am really shocked that you even speculate on those "brand- rebrand" table. This is a kind of very, very bad joke that has nothing to do with reality. And it is not even funny. :oops:
 
If it is indeed true that the HD 5770 would be renamed into the HD 6770, that would be a huge blunder and disgrace to AMD. Considering the media blow back on NV for their renaming crap...

Also pushing a chip that should be the HD 6770(Bart), to the HD 6870 is higly shady. Come on AMD, do you really have to resort to fooling the public while your on top? :rolleyes:
 
Aren't words like "disgrace", "shady" etc, and accusing AMD of fooling people a bit rash, considering they haven't actually announced ANYTHING yet? :rolleyes:
 
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