AMD: R9xx Speculation

[CarstenS]

What might those strategic reasons be? Low volume due to low yields isn't a strategic reason and I can't think of another reason at the moment.

who told oyu it had all its pieces enabled ? Allwe know is that the 5870 is the most complete cypress , we don't know if it is a complete cypress though.

The answer to both is common sense. Nvidia would cannibalize the expensive GTX 470 with a fully blown GF104 with clocks in the 750/1500 range and AMD would (or should) really DIE to see their fully blown Cypress with a little higher clocks and 1920 ALUs best GTX 480 in most games.

 

[CarstenS]

Capacity and confidentiality issues aside, why would TSMC NOT sell you the wafers? And I am sure you understand that the wafer prices are a function of demand/supply/history of producer-consumer relationship. With that in mind I haven't really understood your doubts. Can you clarify?

Sure, sorry. I was talking about probably long-term contracts, maybe including compensation for entering risk-production of new processes early, high-profile mutual partnerships (kind of advertisement) and of course volume rebates. I don't doubt that TMSC would sell me a lithographed wafer from my supplied masks, but I sure as hell wouldn't be getting it for the mentioned 5000 dollars (for the sake of argument lets assume this sum is in the right ballpark).

 

[aaronspink]

who told oyu it had all its pieces enabled ? Allwe know is that the 5870 is the most complete cypress , we don't know if it is a complete cypress though.

The 5830 and 5850 are both salvage pieces we are almost a year into cypress's life point and even the heavly cut 5830 still exists. We know that they are supply limited so you would think that the 5830s that could work as 5850s would be used as 5850s. So its obvious they still aren't producing 5850s and thus 5870s in large enough numbers. So the question is , is a fully functioning cypress being produced right now?

Even in the best of possible processes a wafer without defects is unheard of. It just doesn't happen. Even a wafer with all dies functional is extremely rare. This is simply a fact of life.

And yes, the 5870 is the complete cypress.

 

[aaronspink]

Because the price the IHVs pay is inclusive of amortized fixed costs. If you buy a single wafer it's not going to be $5000.

Of course not, you CANNOT buy a single wafer. You can only buy a lot of wafers. The realistic minimum lot size has a lower bound in the number of wafers within a boat. A boat depending of the design has between 10 and 20 wafers. In addition, you generally want to have a minimum number of boats per lot for efficiency in switching out mask sets on the steppers but I'm sure that TSMC will let you do hot lots for more money down to 1 boat.

Once you get into a reasonable lot size of say 2K wafers, you are pretty much into standard pricing. Pre-committing early on to wafer lots over time likely also gets you some discounts for those lots but but it isn't going to be extreme, and this doesn't involved substantial payments up front.

That's his point. Charlie's obsession with die size and ridiculous suggestions that he knows AMD's and Nvidia's cost schedules with TSMC are probably far off base given the realities of such contracts - not the least of which are the volume/relationship considerations you mentioned.

The general prices of wafer contracts isn't exactly a mystery in the semi industry. And you can bet that AMD and nvidia's wafer pricing is roughly about the same. After a certain level of wafers, there is no point in offering additional discounts.

 

[neliz]

Oh, speaking of a hornet's nest…
Well, I double checked my facts of course, but links to wikipedia are so much more convenient. However, both companies give exactly the same numbers as those I've linked in wikipedia.
http://www.amd.com/us/press-releases/Pages/firestream-peak-performance-2010june23.aspx
http://www.nvidia.com/object/product_tesla_M2050_M2070_us.html
Since I don't know for sure what power and FLOPS values David used for his chart I assumed they were the official ratings for all kinds of processors.

We all know that that GF100, given the right workload, can surpass it's theoretical power draw. We've seen TPU measure 320W under full load already and nVidia itself has changed the information on it's site.
for TDP it used to say "Average consumption: 225W" and now it says: "Maximum board power 250W"

 

[chavvdarrr]

Yes, But he wasn't angling for the dize size, was he? He seemed a tad more interested int he _die shot_

AlexV got what I meant, mechanically translating word after word is not good

 

[trinibwoy]

Of course not, you CANNOT buy a single wafer.

I'm not sure if you're waxing pedantic because you missed the point or not. The point is that the net costs to the IHV's will not be based solely on simplistic die size measurements which was the basis of Charlie's rant.

And you can bet that AMD and nvidia's wafer pricing is roughly about the same.

And I'll bet they're not. Based on a similiar amount of information that you provided

 

[Alexko]

We all know that that GF100, given the right workload, can surpass it's theoretical power draw. We've seen TPU measure 320W under full load already and nVidia itself has changed the information on it's site.
for TDP it used to say "Average consumption: 225W" and now it says: "Maximum board power 250W"

I seriously doubt that NVIDIA would try that sort of thing on Tesla. Plus, even though this card has a lot of memory, it is only clocked at 575/1150MHz, with only 448SPs enabled, so 225W sounds about right.

It's higher than the GTX 470's "TDP" of 215W, even though the latter is clocked at 607.5/1215MHz. And it actually seems to have a more realistic TDP than the GTX 480.

 

[CarstenS]

We all know that that GF100, given the right workload, can surpass it's theoretical power draw. We've seen TPU measure 320W under full load already and nVidia itself has changed the information on it's site.
for TDP it used to say "Average consumption: 225W" and now it says: "Maximum board power 250W"

Could you please tell me the voltages of the Tesla products to which you seem to compare Geforce products?

 

[neliz]

Could you please tell me the voltages of the Tesla products to which you seem to compare Geforce products?

That's Easy, C2070 runs it's GF100@1.0V and has a "board power" greater than 238W. (actually.. I think it's still listed as "TBD" in the official documents.) GTX480 default is 0.950 right the "C2070" documents from last year say 1.05v? What are you getting at?

Tesla C2050/2070 Specs v1 November 2009:

GPU
Number of processor cores: 448
Processor core clock: 1.25 GHz to 1.40 GHz
Voltage: 1.05 V
Package size: 42.5 mm × 42.5 mm 1981-pin ball grid array (BGA)

Board
Ten layers printed circuit board (PCB)
Physical dimensions: 4.376 inches × 9.75 inches, dual slot
Board power dissipation: < = 225 W

Memory clock: 1.8 GHz to 2.0 GHz

Tesla C2050/2070 Specs v3 July 2010

GPU
Number of processor cores: 448
Processor core clock: 1.15 GHz
Voltage: 1.00 V
Package size: 42.5 mm × 42.5 mm 1981-pin ball grid array (BGA)

Board
Ten layers printed circuit board (PCB)
Physical dimensions: 4.376 inches × 9.75 inches, dual slot
Board power dissipation
● Tesla C2050: Less than or equal to 238 W
● Tesla C2070: TBD

Memory clock: 1.50 GHz

Edit: Why the heck are we discussing Tesla Specs here? (besides making fun of nV because in 3 quarters they lowered every spec and still end up with a higher TDP)

 

[Jawed]

Carsten: I'm actually updating the chart myself, and I hope to put out a revised version on a regular basis. There are a ton of data points that need to be added from both CPU and GPU land.

It might be worth differentiating the consumer boards and the GPUs' "compute" versions, i.e. cards with extra memory, up to 4GB for ATI and 6GB for NVidia. Obviously CPUs on your chart don't have power consumption for memory included, so they benefit a bit. But GPUs can't operate without dedicated memory at any decent performance level.

 

[aaronspink]

I'm not sure if you're waxing pedantic because you missed the point or not. The point is that the net costs to the IHV's will not be based solely on simplistic die size measurements which was the basis of Charlie's rant.

Compared to other IHV, die size either is a significant factor. The only way to get better pricing after a certain point is to either have the fab be dependent on you (aka you go, they die) or to workout a deal where you upfront large amounts of capacity cost. Neither of which are true with the 40nm node that is globally capacity constrained and will be for the foreseeable future.

And I'll bet they're not. Based on a similiar amount of information that you provided

I'll go out on a limb and say they are within 5% of each other.

 

[neliz]

I'll go out on a limb and say they are within 5% of each other.

I saw a Q2-10 report on EETimes which mentioned a median 300mm wafer price of $3200 which was up from $2900 in Q1, are those numbers realistic? And are these price increases a factor when ordering large amounts like AMD/NV do?

 

[Alexko]

I saw a Q2-10 report on EETimes which mentioned a median 300mm wafer price of $3200 which was up from $2900 in Q1, are those numbers realistic? And are these price increases a factor when ordering large amounts like AMD/NV do?

I don't presume to know much about TSMC's business, but perhaps this increase in median wafer price is simply due to a more favorable product mix. After all, 40nm wafers are probably much, much more expensive than 130nm ones, especially with the current supply constraint.

 

[Jawed]

Correct, it would be dumb to only allow one triangle per wavefront/warp.

Bear in mind that ATI's rasteriser is still based on R520 (though the fixed function interpolator unit has been deleted). Which was only 16 fragments per hardware thread. Packing multiple triangles' fragments into a thread wasn't a priority back then.

R520 rasterised 4 quads per cycle. Then along came RV530 and R580 with 3x the count of fragments per hardware thread compared with rasteriser throughput.

So it seems possible that the rasteriser can switch triangle each cycle while populating a hardware thread. The fixed function interpolator, because it allocates registers and populates them with interpolated attributes, per fragment (quad), appears to have the inherent flexibility to support an arbitrary count of triangles per thread.

Additionally, the interpolator's limited throughput (typically two vec4 attributes per clock) means that a pixel shader with lots of inputs is going to be rasterised more slowly than full speed.

Whether ATI waits until a hardware thread is fully populated with quads I don't know. The variability of R5xx architecture and the limited interpolator throughput would imply so.

When this appeared:

http://www.icare3d.org/GPU/CN08

I don't think it would run on ATI. Not sure if it does now.

 

[trinibwoy]

Compared to other IHV, die size either is a significant factor.

That's what Charlie seems to be saying too.

Can you say squeezed margins, if they exist at all? ATI can lop $100 off their retail price and still make more money on Cypress than Nvidia currently makes on GF104.

Now how do you reconcile that with the fact that Nvidia has no CPU business yet has higher gross margins than AMD (45.6% vs 45%) in the second quarter of this year with those huge economically unviable dies they keep making? Inconvenient facts?

 

[Alexko]

That's what Charlie seems to be saying too.



Now how do you reconcile that with the fact that Nvidia has no CPU business yet has higher gross margins than AMD (45.6% vs 45%) in the second quarter of this year with those huge economically unviable dies they keep making? Inconvenient facts?

Has NVIDIA released their gross margins for Q2, yet?

Anyway, they've sold about three and a half GF100s, so those don't matter much. Their margins are mostly due to 40nm DX10.1 chips. And of course, Tesla and Quadro have very high margins.

 

[Jawed]

Now how do you reconcile that with the fact that Nvidia has no CPU business yet has higher gross margins than AMD (45.6% vs 45%) in the second quarter of this year with those huge economically unviable dies they keep making? Inconvenient facts?

It's pretty simple: the lack of profitability for the bigger chips in the consumer space is irrelevant when NVidia owns the professional and compute spaces. I know you know this, just lots of people ignore it.

Of course, that doesn't help the AIBs...

Jawed

 

[Psycho]

Tesla C2050/2070 Specs v3 July 2010

TDP: 247W http://www.nvidia.com/object/product_tesla_C2050_C2070_us.html

 

[trinibwoy]

Has NVIDIA released their gross margins for Q2, yet?

Their fiscal Q1 2011 is comparable to AMD's Q2.

Anyway, they've sold about three and a half GF100s, so those don't matter much. Their margins are mostly due to 40nm DX10.1 chips. And of course, Tesla and Quadro have very high margins.

Sure making up facts is always an easy way out.

It's pretty simple: the lack of profitability for the bigger chips in the consumer space is irrelevant when NVidia owns the professional and compute spaces. I know you know this, just lots of people ignore it.

I think we can all agree that they are going to sell a boatload of GF104 based cards for ~$200. They're projecting a gross margin improvement in the next quarter. So a couple thousand sales of professional cards are going to offset poor margins on millions of GTX460's? Charlie didn't even go to those lengths trying to justify his misdirected nonsense.