AMD: Navi Speculation, Rumours and Discussion [2019-2020]

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Bondrewd said:
what does this even mean at this point?
Your FOTM ML framework set?
That one it will; but many startups also do that, kinda.
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ML framework support isn't where the battle is being fought. That is child's play.

Nvidia is rolling practical turnkey AI solutions based on a cohesive hardware and software ecosystem. They're also investing heavily in the talent pipeline for ML scientists, essentially buying mindshare. AMD has nothing to match that.
 
trinibwoy said:
ML framework support isn't where the battle is being fought
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That's what most hyperscalers (okay, most customers want) want.
It needs to run %stuff% and be preferably TCO-sane while doing it.
trinibwoy said:
Nvidia is rolling practical turnkey AI solutions based on a cohesive hardware and software ecosystem
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Wdym?
In-house reference server designs are nothing special, AMD can contract QCT or any other ODM out for those should they want (but they don't).
I guess HGX-derived stuff is neat?
trinibwoy said:
They're also investing heavily in the talent pipeline for ML scientists, essentially buying mindshare
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I asked you to tell me what do you mean by "software ecosystem" and not read me a whole nVidia PR piece.
trinibwoy said:
AMD has nothing to match that.
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Idk chief there are no less than two hueg AMD-powered systems which will run all kinds of HIP (maybe SYCL) code, and that code will often be ML, too.
 
Bondrewd said:
That's what most hyperscalers (okay, most customers want) want.
It needs to run %stuff% and be preferably TCO-sane while doing it.
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We should see AMD grab massive marketshare soon then with their cheap beatstick.

I asked you to tell me what do you mean by "software ecosystem" and not read me a whole nVidia PR piece.
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The point is that cheap hardware isn't the path to market dominance. I will leave the PR to you :)

Idk chief there are no less than two hueg AMD-powered systems which will run all kinds of HIP (maybe SYCL) code, and that code will often be ML, too.
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Two versus how many huge non-AMD-powered systems?
 
trinibwoy said:
We should see AMD grab massive marketshare soon then with their cheap beatstick.
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It'll net them something yes.
With uh, some very unexpected customers to boot.
trinibwoy said:
The point is that cheap hardware isn't the path to market dominance
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Cheap and very fun, yes.
Get's a bit crazy next year but I'll leave that for you to guess.
trinibwoy said:
Two versus how many huge non-AMD-powered systems?
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Two that run actually relevant codes in large capacities.
I'm very very sorry but DOE said fuck CUDA.
 
eastmen said:
New rumors

https://videocardz.com/newz/amd-sienna-cichlid-navi21-big-navi-gpu-memory-rumors-hbm-vs-gddr6

Rumor 1 Sienna cichild has HBM as does arcturus which is the new radeon instinct

Rumor 2 Big navi has a 512bit 16 GB memory set up.

More information at the link. Dunno how true it is. Perhaps the HMB edition is the highest end ?
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Thinking about it recently, ultra high end rendering is an actual market. The RTX 8000 has 48gb of ram and costs $5k. It's probably what's powering season 2 of The Mandalorian for their live action backprojection stuff, not to mention some production renderers are starting to put in DXR acceleration options. AMD could get in on that market with an HBM card. 2e goes up to 96gb for 4 stacks, which could technically hold an entire high end, movie quality scene in memory. EG the Moana main island dataset (base) is 93gb, imagine rendering the entirety of Moana's main island environment in realtime.

Not that 12 high/24gb stacks are available yet, but the point stands and 64gbs for 4 stacks (practical limit based on die size, a100 has 5 but is huuuuge) is still damn good, and could be upgradable in hypothesis. Point is taping out 7nm stuff is massively expensive and apparently there's only 3 main GPUs they're planning, thus AMD could use a salvage bin for ultra high end consumer stuff. HBM is expensive, but realistically 16gb, or two eight high stacks of HBM2E would deliver what, about 70% (littler more) boost in bandwidth over the 5700xt. 16-17 teraflops would put high end consumer Navi in competitive range with Nvidia's new stuff if some of the leaks are anything to go by. It'd be more costly than GDDR6 that's certain, but, not impinging thaaat much on profit margins and give a much better edge in the ultra high end market.

As for 512bit, that's technically possibly but seems a bigger stretch. Combining a 384bit bus with the newer 18gbps GDDR6 would yield a 92% increase in bandwidth by itself. Almost doubling the 5700xt's performance while keeping in consumer range TDPs and adding raytracing and etc. is already a very high goal to hit, doing somehow even more seems less likely. I mean, not impossible in a technical sense I'd suppose, but between the two I'd actually bet on first rumor (the two seem mutually exclusive). Obviously doubly so if it's confirmed to be an actual commit.
 
Bondrewd said:
Yeah; move your codebase onto something portable or die trying.

A niche beyond niche AMD isn't interested in.
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I mean, maybe. And it'd probably be too small no matter what to support salvage for a bigger chip. Then again, maybe just tile out the HBM stacks, one GPU with 2 sets of stacks and some future one with 4+? I guess it depends on if that commit is really there, because I couldn't explain using HBM otherwise, the energy savings of a few watts versus GDDR6 just aren't enough once you go beyond mobile.

Then again, hell maybe it's the mobile focused sequel to the 5600m. That's got a 2048bit bus as well.
 
SimBy said:
It's over 500mm^2? So there's no way it's only 64 CUs that I've heard floating around last few days.
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Of course it won't be mere 64 CUs, think about it for a second - even with all the advancements in RDNA that would be nowhere near challenging any sort of highend unless you're clocking it somewhere around 3 GHz which is definitely still out of realm of possibilities (LN2 and He cooling aside)
 
Kaotik said:
Of course it won't be mere 64 CUs, think about it for a second - even with all the advancements in RDNA that would be nowhere near challenging any sort of highend unless you're clocking it somewhere around 3 GHz which is definitely still out of realm of possibilities (LN2 and He cooling aside)
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I guess the math was 64 CUs at 2.2GHz. We know 2.2GHz is doable. That's what 18 TF. But again that would be nowhere near 500mm2.
 
trinibwoy said:
Maybe they added 200mm^2 of raytracing hardware :)
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hm... I don't suppose more cache (L1/L2?) would be part of that? As weird as the MS discussion was about RT on Series X, I had the impression that they would do compute and RT simultaneously, so I assume more cache would be beneficial. Then there's the fact that the ROPs are clients of the L2.

:unsure:
 
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