AMD: Navi Speculation, Rumours and Discussion [2017-2018]

[3dcgi]

These rumors are difficult to believe and remind me of the first batch of Polaris(faster than a gtx 980 ti), Fiji(gtx 980 ti + 10-15%) and Vega rumors(gtx 1080 ti + 15%).

And I believe they have a similar purpose. That is any rumors at this point help AMD out more than hurt it, even if they are hyped up ones.

That is the more they stall Nvidia cards sales, the more the potential marketshare available when the cards do release. They also help prop up the stock by creating hype for both their CPU and GPU release.

The problem with these rumors is that they lead to initial disappointment upon release and eventually people catch on. Reality dictates that the GCN architecture(and Navi will be the last card using it) has had most of its potential squeezed out and any performance increases at this point are mostly clocks and increasing tflops which are decreasing in terms of those flops turning into gaming performance.

With Vega running into a wall in terms of clocks due to power, I can't see Navi solving this issue on 7nm to the extent AMD needs to achieve that level of performance at 150watts. Navi will have a moderate amount of shaders because of the 256 bit bus and a moderate amount of ROPs to achieve mainstream pricing. That would means it would needs high clocks to make up the rest and this is where power becomes an issue. 7nm is not going to be the magic bullet considering where Polaris 30 currently is at and from what we have already seen with Vega 20 at 7nm.

From what we have seen already, Vega 20 7nm has performance approximately at Vega 64 + 15% considering the 1800mhz clocks and it does this at 300watts(and this is the main reason Vega 7nm is not coming to consumers as it performs along the lines of rtx 2070 but at much greater cost to AMD).

Now these rumors point to this level of performance without HBM2 at half the power? AMD viral marketing team can keep on tricking us with hype but they need to deliver at some point. Because past hawaii, the rumor about performance that has been the most true has been typically the most pessimistic and worse case scenario. This includes the r9 285 through Vega. That is, they are worse than the competition with significantly worse power draw. If you look at AdoredTV expectations of performance for AMD cards, the only one that was correct the one where Vega was a disappointment, which should have been obvious considering the silence from AMD officially while Pascal was cranking out record sales. The Shanghai GPU team has just been a disappointment so far compared to the Markham team.

AMD is barely able to catch Maxwell even today in terms of performance per watt.

Relative to the cards in the lineup, even the metrics of those cards don't make much sense at the moment.

The RX 3080 will not have linear pricing with an RX 3070 while having the same memory configuration because the above scenario shows the RX 3080 with 26% better performance for 25% more money vs the RX 3070. This is not how you price products going down the stack as it drives people to buy the supply limited high end SKU while leaving the more plentiful card less desirable and thus stalling sales. This is because demand for the top end outstrips supply while the lower end SKU does not sell because it is a worse value which causes these buyers to wait for the top SKU. This means lost profit at the top product can sell for more money which is shown from demand outstripping supply and secondly lost volume on sales on the lower end product as people wait for the top product.

Secondly, the pricing of these cards doesn't make sense considering what AMD just released the RX 590 at. AMD isn't going to release this card at a lower price than the RX 590 considering 7nm's is an even more expensive node than 14nm while having 8gb of gddr6 vs gddr5 is also an increase in pricing over RX 590.

What the last couple years have shown us is the success of AMD CPU division does not carry over to their GPU division. I see very little reason for this to change because AMD focus is still clearly more on their CPU as their road maps and presentations go and the Shanghai team has not proven itself yet.

I don't know where this Shanghai vs. Markham thing comes from. There's no such competition.

 

[yuri]

Therefore, if true, the RX 3k series is a reworked Vega 64 style uarch, shrunk down to 7nm. With the end-users receiving all the cost/performance/heat advantages of the new node process. Vega 64 +15% @ 150w is exactly the metrics that AMD showed in their 7nm slides of Vega20. I find this move by AMD entirely plausible and almost exactly what Dr Su has been telling us all along.

AMD has shown that VEGA 20@~1.2GHz would have pulled 50% power compared to VEGA 10@~1.2GHz.

Vega64 + 15% leads to 1.8GHz frequency, therefore not 150W.

 

[Rootax]

Why do you compare Navi and Vega ? I don't believe that Vega@7nm is a good representation of what 7nm can do, because Vega was not designed with 7nm in mind from the start, and Vega 20 a "translation" for 7nm, but not a native 7nm product.

And even if Navi is GCN, it doesn't mean It's a tweaked Vega. In my mind, Vega 10 is kind of broken anyway, with some functions announced and never used, so I don't know, something is off with that chip, reminds me of R600... I guess they will pull another RV770 with Navi... I hope anyway, GPU market needs competition, and can't wait 2020 or 2021 for Intel...

 

[3dilettante]

If I heard the video right, the Navi12 rumor goes further by linking it to the desktop graphics Zen2 chiplet products.
To get a picture of the range this apparently single chip encompasses:
A 15-CU 65W Ryzen with graphics, a 20-CU 95W Ryzen with graphics. Maybe 40-50 GB/s bandwidth of DDR4, shared with CPU.

Then the GPUs stated to use the same GPU:
A 75W GDDR6 GPU matching a 36-CU 256 GB/s RX 580.
A 120W GDDR6 GPU matching a 56-CU 410 GB/s Vega 56.

That's a very wide swath in terms of silicon and bandwidth. Even if talking chiplet that's a lot to ask of one design that has to cater to all of them without incurring the overhead and cost of the most expensive feature along each axis.
AMD has stated that multi-GPU is not a prospect yet, and yet the rumor has a chiplet plugging into very different systems. The CPUs were allowed to bring 1-8 fellow chiplets and a big IO die (not sure the client one needs to have an IO die that big), whereas this rumor has the GPU on its own matching Vega 56 while still fitting in a slot taken up by one Zen2 chiplet. Navi is the "scalable" design, but I'm not sure about this.

 

[yuri]

TBH, AMD toyed with the idea of a "HPC APU" which would seemingly involve a separate CPU(s) and GPU dies. In that case it was 1-2 8 core Zen1 CPUs and 1 VEGA 10/20 GPU with 2 HBM stacks.

All this was way before the whole chiplet stuff.

 

[w0lfram]

AMD has shown that VEGA 20@~1.2GHz would have pulled 50% power compared to VEGA 10@~1.2GHz.

Vega64 + 15% leads to 1.8GHz frequency, therefore not 150W.

But the Mi60 isn't a shrunk down mi25. (Look at the specs)

Given the same, just reduced to 7nm::
https://www.overclock3d.net/gfx/articles/2018/06/05235221134l.jpg

 

[Anarchist4000]

That's a very wide swath in terms of silicon and bandwidth. Even if talking chiplet that's a lot to ask of one design that has to cater to all of them without incurring the overhead and cost of the most expensive feature along each axis.
AMD has stated that multi-GPU is not a prospect yet, and yet the rumor has a chiplet plugging into very different systems. The CPUs were allowed to bring 1-8 fellow chiplets and a big IO die (not sure the client one needs to have an IO die that big), whereas this rumor has the GPU on its own matching Vega 56 while still fitting in a slot taken up by one Zen2 chiplet. Navi is the "scalable" design, but I'm not sure about this.

With Vega, IF took up a fair amount of space and didn't leave the chip. Navi could be offloading certain IF clients with a chiplet approach and keeping the GPU as the IO die. Especially any clients that Ryzen may also contain: display engine, media encode/decode, front-end. Perhaps a two socket Epyc style GPU could be doable.

 

[Frenetic Pony]

If I heard the video right, the Navi12 rumor goes further by linking it to the desktop graphics Zen2 chiplet products.
To get a picture of the range this apparently single chip encompasses:
A 15-CU 65W Ryzen with graphics, a 20-CU 95W Ryzen with graphics. Maybe 40-50 GB/s bandwidth of DDR4, shared with CPU.

Then the GPUs stated to use the same GPU:
A 75W GDDR6 GPU matching a 36-CU 256 GB/s RX 580.
A 120W GDDR6 GPU matching a 56-CU 410 GB/s Vega 56.

That's a very wide swath in terms of silicon and bandwidth. Even if talking chiplet that's a lot to ask of one design that has to cater to all of them without incurring the overhead and cost of the most expensive feature along each axis.
AMD has stated that multi-GPU is not a prospect yet, and yet the rumor has a chiplet plugging into very different systems. The CPUs were allowed to bring 1-8 fellow chiplets and a big IO die (not sure the client one needs to have an IO die that big), whereas this rumor has the GPU on its own matching Vega 56 while still fitting in a slot taken up by one Zen2 chiplet. Navi is the "scalable" design, but I'm not sure about this.

Oh, I wasn't aware they'd quote CU stuff, didn't see it written down.
But the binning width needed between a 36CU and 56CU bin is ridiculous. Binning costs money, how much is AMD planning to spend on this?

Also how is a 56CU chip on current 7nm going to sell for just $250? Dropping 40% or more of the cost between generations of the same fundamental arch doesn't seem believable. At this point it might be best to ignore the rumors and wait till the official announcement.

 

[3dilettante]

With Vega, IF took up a fair amount of space and didn't leave the chip. Navi could be offloading certain IF clients with a chiplet approach and keeping the GPU as the IO die. Especially any clients that Ryzen may also contain: display engine, media encode/decode, front-end. Perhaps a two socket Epyc style GPU could be doable.

At least for the MI60 that was the initial subject of analysis, at that level of bandwidth the non-core area is dominated by memory PHY and the associated controller/data fabric. The fabric was a mesh in Vega 10, and in Vega 20 it's some unspecified topology--that happens to run a circle around the whole GPU. The bottom of the drawing of the MI60 has two rather large xGMI blocks and possibly some fabric stops. That bandwidth may require a decent amount of area on both the GPU and any separate die, although not as high as the memory traffic.
The top portion of the die appears to be where most of the ancillary logic might be, or some fraction of that area that's not data fabric. At least for a big GPU, it's a pretty minor area savings, though their lower bandwidth demands may allow for a reasonably compact and lower-power inter-die path.

Where the dis-integration might happen if Navi 12 has a GPU and IO die is unclear. The upper tier has data transport needs much closer to MI60 than to a Ryzen CPU with graphics, so there's a tension between how compact and efficient the GPU can be if there's a large amount of off-die communication, and yet at the same time it's content to fit in an AM4 socket with 40GB/s memory and a chiplet footprint. Having two GPU chiplets in play could resolve some of that contradiction, however AMD has indicated this is not the current plan.
Polaris 10 as a comparison point is about 2/3 core GPU area, with the rest being GDDR and other IO/silicon. I think the core GPU area could shrink down to something approximating the chiplet area, but if this means the memory bus is off-die some amount of area gets tacked back on, enough to cover that order of magnitude range in bandwidth. Tacking on an extra 30-40mm2 might keep memory bandwidth on-die, although in a Ryzen product perhaps it can rely on xGMI for the dis-integrated blocks and the limited DDR4 bandwidth. That's larger than a CPU chiplet, but still compact.

Oh, I wasn't aware they'd quote CU stuff, didn't see it written down.
But the binning width needed between a 36CU and 56CU bin is ridiculous. Binning costs money, how much is AMD planning to spend on this?

Also how is a 56CU chip on current 7nm going to sell for just $250? Dropping 40% or more of the cost between generations of the same fundamental arch doesn't seem believable. At this point it might be best to ignore the rumors and wait till the official announcement.

The AdoredTV video has a table of purported Ryzen products, including two G variants with either 15 or 20 CUs. The rumor goes further and states that they are using the same Vega 12 as the Vega 12 discrete products. While the max CU count of Vega 12 isn't stated, the two Vega 12 discrete products have the RX 580 and Vega 56 listed as their equivalent in performance--not necessarily CU count. Either 20 or so CUs goes much further, or there's a significant amount of silicon and memory bandwidth not in play with the Ryzen G products. It's not explained what would be done to get this broad range of power/cost/performance/bandwidth.

 

[Entropy]

It's not explained what would be done to get this broad range of power/cost/performance/bandwidth.

If we accept AdoredTV as being a Bearer of Truth (*cough...*), the wide span could easily be explained by the usual sloppy/generous comparisons on for instance PR slides of product positioning between generations. Wouldn't read too much into it.
Unless you want to point to it as an indication that the claims are made up, in which case I fully understand you.

 

[3dilettante]

If we accept AdoredTV as being a Bearer of Truth (*cough...*), the wide span could easily be explained by the usual sloppy/generous comparisons on for instance PR slides of product positioning between generations. Wouldn't read too much into it.

Within the sphere of discrete cards and APUs, if evaluated separately, I can think of various ways to get the sort of scaling done--if you squint at the results at just the right angle. There are potential objections or weaknesses in each, but for example I can see a possible Navi implementation that might be balanced somewhere around Polaris in CUs and other resources, with games being played with GDDR6 speed grades and very low or very high clocks forcing performance into the 580 or Vega 56 ranges for bandwidth or compute performance, with the usual error bars and marketing.
Similarly, there are potential objections to a 20 CU APU, with possible workarounds or compromises.

Combining the two regimes and the order of magnitude spread is awkward in how even the objections do not play well together, and for me enter the realm of needing extraordinary proof or more effort in explanation if they are taken to be close to truth.
I'd like to be pleasantly surprised by some recombination of features, or some new tech that gives a significant architectural improvement.

One irony to the idea of a ~20 CU GPU scaling so far up and down is that if true it would highlight a continued shortcoming of AMD's client CPU graphics options. Intel's managed to have a GPU standard for pretty much forever on its CPU silicon. In this rumor, AMD now has a GPU so effective that it wouldn't need 20 CUs that can match Vega 56 to max out out what the socket's bandwidth can provide. A right-sized GPU with these super-effective resources could be quite small and could make its way everywere, and yet despite the hyped manufacturing revolution there's a rumor with just 2 APU SKUs.

Unless you want to point to it as an indication that the claims are made up, in which case I fully understand you.

That's one of my leading scenarios. I don't have enough information to state outright that it's wrong because of X, Y, or Z. However, even though I cannot definitively state any one objection is irrefutable, it doesn't seem like they can all be explained away with what is given, and many solutions for one will worsen the others.

I'd like to be pleasantly surprised with some new technology or an explanation of new economic or manufacturing trends, however.

The more negative interpretation that might be interesting is that the rumor is substantially true, and the answer to the objection "this might not be true because it may create significant problems along various axes" is "it is true and has problems along these axes". (Also known as the Bulldozer rejoinder.)

 

[Silent_Buddha]

One irony to the idea of a ~20 CU GPU scaling so far up and down is that if true it would highlight a continued shortcoming of AMD's client CPU graphics options. Intel's managed to have a GPU standard for pretty much forever on its CPU silicon. In this rumor, AMD now has a GPU so effective that it wouldn't need 20 CUs that can match Vega 56 to max out out what the socket's bandwidth can provide. A right-sized GPU with these super-effective resources could be quite small and could make its way everywere, and yet despite the hyped manufacturing revolution there's a rumor with just 2 APU SKUs.

Yes, no matter what one might think of the GPU inside of the Intel CPUs, Intel has to be commended for having a GPU in basically all of the consumer CPUs. Something you would think AMD should be capable considering that they are both a CPU and GPU company.

Not to mention then being able to use Adaptive Sync easily with an NV GPU if I wanted.

Regards,
SB

 

[sonen]

Yes, no matter what one might think of the GPU inside of the Intel CPUs, Intel has to be commended for having a GPU in basically all of the consumer CPUs. Something you would think AMD should be capable considering that they are both a CPU and GPU company.

Is what made 8700k an easy choice for me over Ryzen 1800/x.

Not to mention then being able to use Adaptive Sync easily with an NV GPU if I wanted.

What do you mean? Render with NV GPU and output via Intel GPU with Adaptive Sync working?

 

[Kaotik]

What do you mean? Render with NV GPU and output via Intel GPU with Adaptive Sync working?

No, Render with NV GPU and output via AMD GPU if AMD put GPU in all their CPUs.
But also yes with the Intel option if Intel implements adaptive-sync on their current IGPs at some point

 

[Malo]

Is what made 8700k an easy choice for me over Ryzen 1800/x.

Out of curiosity, what do you need the iGPU for at that level of CPU?

 

[sonen]

Out of curiosity, what do you need the iGPU for at that level of CPU?

For everything that's not GPU heavy gaming: 2D gaming, summer season gaming (under 100W total heat output), movies, www, OS rescue, system diagnostics etc...
When I'm into heavy gaming, I switch to R9 290, which again is undervolted ( and underclocked if FPS is hitting refresh limit) keeping the that total heat <250W. I'll even alternate between 60Hz and 75Hz on my FreeSync monitor depending on the game.
I really the don't like the unnecessary heat

Spoiler

 

[BoMbY]

Or use the iGPU for your primary system (Linux) and use the dGPU for your gaming VM (passthrough).

 

[w0lfram]

For everything that's not GPU heavy gaming: 2D gaming, summer season gaming (under 100W total heat output), movies, www, OS rescue, system diagnostics etc...
When I'm into heavy gaming, I switch to R9 290, which again is undervolted ( and underclocked if FPS is hitting refresh limit) keeping the that total heat <250W. I'll even alternate between 60Hz and 75Hz on my FreeSync monitor depending on the game.
I really the don't like the unnecessary heat

I think you are doing that, just to be complicated. GPUs scale down in power when not using them in games.

Secondly, AMD has CPUs w/graphics (Ryzen). Given the level of power needed for your gaming, you might not even need to use your 5 year old R9.

 

[Theeoo]

Maybe there should be an Nvidia optimus or equivalent for desktops.

 

[Kaotik]

Maybe there should be an Nvidia optimus or equivalent for desktops.

Windows has built-in support to pick GPU per application. I think AMD and NVIDIA drivers have it too