[Apologies for the hilariously long post, I haven't written anything so long on Beyond3D since I started working so I got carried away a bit! Obviously these are strictly my own opinions and I'm not speaking for anyone else here)
Frankly NVIDIA's slides don't make much sense to me, likely because they're intentionally making things look worse than they really are. First of all I somewhat suspect they're somehow including the cost of the the I/O elements that don't scale (i.e. their 'scaling factor' is less than the actual transistor scaling). But more importantly, if the cost of 40nm transistors only became cheaper than 55nm transistors in Q4 2010, then why does their other graph show that they manufactured ~4x more wafers on 40nm than 55nm for the full year of 2010? Some of that can be attributed to their DX11 architecture being 40nm-only, but then why did they manufacture nearly 1/3rd as many 40nm wafers as 55nm wafers in 2009 when the costs were so much higher?
The answer is very likely power consumption (and performance to a lesser extent but these are somewhat interlinked if you can adjust your voltage). You pay more per transistor but each transistor is more power efficient. This also implies that NVIDIA's entire argument is rather dubious: as there is a fundamental trade-off between area and power at several different design points (architecture, synthesis, voltage, etc.) then it would make more sense to compare cost for identical power consumption (roughly speaking as this is highly non-linear). And when you do that, the new process node will become more cost efficient much faster than it does when only comparing transistor cost.
It's certainly true that both cost per transistor *and* power consumption scaled down faster several process generations ago. That doesn't mean process scaling is anywhere near dead yet and I'm sure that NVIDIA realises that. I suspect that what they're really trying to do there is pressure TSMC to accept lower gross margins on new processes to essentially subsidise early adopters (i.e. NVIDIA but also AMD/Qualcomm). They already do that but obviously NVIDIA would like them to do so even more.
By the way, we do have some actual cost targets from TSMC for 28nm vs 40nm and for 20nm vs 28nm. They are quite revealing:
Lora Ho said:
We do have an internal goal for 28 nanometer cost. It is a parity to our 40 nanometer. We are working hard to achieve that goal. In the same time, we believe the value we bring to the customer in 28 nanometer. On the pricing side, we should be able to get a reasonable price so that the SGM for 28 nanometer will not be lower than the prior node.
Morris Chang said:
It's about a ratio of 1.45 I think. 1.45 per 1000 wafers per month capacity. If that costs $1 capital in on the 28 it will cost $1.45 on 20. Did I explain myself?
It's important to realise that this is strictly capital expenditures and that early capacity is more expensive to build than mature capacity. The actual wafer cost also depends on the materials so for example the cost of High-K is mostly not part of that 'parity' estimate for 28nm. On 20nm where the main cost increase is on the litography side, it makes sense for a larger percentage of the total increase to be visible on the capital side. Also remember that various other expenses have also been increasing very significantly including process R&D (TSMC has been hiring very aggressively in the last few years for example, and non-salary expenses are also increasing a lot for everyone).
Anyway it's pretty clear that a significant part of the wafer price increase on 28nm and the expected increase on 20nm is just TSMC trying to make more money before the process is amortised, and NVIDIA is fighting back to try to get TSMC to subsidise early adopters more. They'll probably just meet in the middle like they always do and this whole thing will amount to nothing (especially as it dates back from November and 28nm yields have increased significantly since then).
I don't think there's any chance of NVIDIA leaving TSMC as long as Jen-Hsun and Morris Chang are both CEOs anyway since they're good personal friends. Morris won't be CEO forever though, he already came back from retirement when 40nm was becoming a huge problem in order to convince customers, e.g. Jen-Hsun, to stick with them rather than switch to GlobalFoundries.
On the other hand, it's also very clear that 20nm cost will increase significantly more than 28nm cost, and wafer prices will increase more accordingly. This is despite 28nm introducing High-K and 20nm not using FinFET. I think TSMC would really really like to use either e-beam or EUV at 14nm rather than keep using more and more expensive variants of immersion litography (BTW, isn't it ironic how EUV was seen by some as likely being forever too expensive 5 years ago, and now the alternatives have become so expensive that lots of people have started looking at it as a way to reduce costs? TSMC still prefers e-beam which is interesting though, I actually hope that gets to market because it would have some more interesting consequences)
