I'm curious
AMD Execution Thread [2024]
- Thread starter del42sa
- Start date
DegustatoR
Legend
Well, making 2CCD SKUs with 3D cache on both this time has been mentioned already.
Another obvious option is to move away from 8C CCDs to 12C or even 16C ones - which should be possible on current production lines.
Upgrading the IOD from the one used in Zen 4 could also bring sizeable benefits in RAM speeds/latencies.
That's off the top of my head.
I thought 16C-32C comes with 2nm. You can't just increase the core count without increasing L3 to compensate the bandwidth requirements. Anybody here knows if these L3 have a scheduler to handle parallel reads if possible(reads, different lines, no write conflicts) for CCDs? At what point does this become a bottleneck?
Chips and cheese has a new article talking about 9800X3D's new 3D V Cache:
chipsandcheese.com
From my understanding, the 3D V Cache is just a capacity expansion over the existing L3 cache, there's no extra port (otherwise it can and should be called a L4 cache).
AMD's 9800X3D: 2nd Generation V-Cache
Following the first generation of V-Cache found in the Zen 3 and Zen 4 X3D SKUs, AMD is now following up with the second generation of V-Cache which is a major change for AMD in terms of packaging.
chipsandcheese.com
From my understanding, the 3D V Cache is just a capacity expansion over the existing L3 cache, there's no extra port (otherwise it can and should be called a L4 cache).
Yes, it's just a capacity expansion, exact same cache level.Chips and cheese has a new article talking about 9800X3D's new 3D V Cache:
AMD's 9800X3D: 2nd Generation V-Cache
Following the first generation of V-Cache found in the Zen 3 and Zen 4 X3D SKUs, AMD is now following up with the second generation of V-Cache which is a major change for AMD in terms of packaging.
From my understanding, the 3D V Cache is just a capacity expansion over the existing L3 cache, there's no extra port (otherwise it can and should be called a L4 cache).
Technically 5nm 16C CCDs were already a thing with Zen 4C in Bergamo, though it was a 2 CCX design. And 1 CCX 16C Zen5c CCDs on 3nm are available on Turin dense.
Rumour is 32C Zen6C on 2nm, and that there will also be 8 and 16 core CCDs well, though the rumour didn't specify which type of core. I suspect it might be Zen 6 standard, to enable Venice with 192C (16C x 12 CCDs), and Venice dense with 256 cores (32C X 8 CCDs).
Is an AMD Arm superchip in the works? Fujitsu will partner with Team Red on AI, HPC, open source and Monaka Arm technology
First results from this partnership expected in 2027
DavidGraham
Veteran
ComputerBase compared 7800X3D vs 9800X3D at fixed equal clocks of 4.8GHz and equal RAM speed, the 9800X3D is found to be 15% faster at iso clocks.
www.computerbase.de
AMD Ryzen 9000X(3D) vs. 7000X(3D) bei 4,8 GHz im Vergleich
Warum ist der AMD Ryzen 7 9800X3D in Spielen im Vergleich zum 7800X3D schneller als gedacht? Benchmarks bei gleichem Takt geben Antwort.
www.computerbase.de
DavidGraham
Veteran
AMD is letting go of 4% of it's global workforce to "align AMD resources with our largest growth opportunities".
wccftech.com
AMD Confirms Laying Off 4% Of Its Employees To Align Resources With "Largest Growth Opportunities"
Chip designer Advanced Micro Devices, Inc. (AMD) is purportedly laying off 4% of its workforce or 1,000 workers, according to online reports.
wccftech.com
Is an AMD Arm superchip in the works? Fujitsu will partner with Team Red on AI, HPC, open source and Monaka Arm technology
First results from this partnership expected in 2027www.techradar.com
The author seems to have made up this statement completely out of thin air. There are some rumours of an AMD ARM APU called Sound Wave (Though I would doubt even that tbh), but there's absolutely nothing to suggest AMD is working on an ARM server chip, nor would AMD have any incentive to compete with its own x86 chips. The article is clear that AMD is only supplying Instinct GPUs and software support.
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