the complaints about the AMD architecture in particular, SDMA, that has to do with latency hiding within radeon right (or rather, how graphics programmers maximize radeon GPU by accounting for the 4 cycle latency?)
SDMA is should be the hardware element exposed as the copy queue in DX12. What appears to be off is that the command packet parsing is off by 4 for the write operations he was trying to perform. The solution was to use something else to fill the data value he wanted to write.
These are queue commands to the device rather than GCN ISA.
Why there is a discrepancy with the SDMA processor compared to all the other microcode processors is unclear.
The PS4 is definitely going out of its way to do a number of things differently. Some of the various items that are considered broken may very well be things Sony doesn't care about, although the extra mile of complexity might be a reason why it seems Sony has so many lightly described firmware updates--while seemingly not correcting these exploits. Some of the roadblocks are areas where Sony is skipping legacy infrastructure, while others truly make me wonder what, if any, kind of vision is going into this.
The ARM SoC and its OS was not probed too much, but oddly enough it seems to be keyed into a lot of the contortions of the platform. The device abstraction, extra complications to memory indirection, and scripting interface for the HDMI controller (helped make the HDR retrofit possible?) make it look like the ARM had more Sony attention than some elements of the APU.
Perhaps it is because Sony's implementation is so readily broken that it was glossed over, but it's like the domain of the APU is supposed to plug into Sony's platform built into the southbridge, and the APU's domain is left oddly exposed with various security elements and hardware features underutilized.
If the PS5 comes out, I would wonder if the thing that stays more constant is the southbridge and its weirdness.
I keep wondering why it's implemented this way.
It's interesting that GPU's F32 ISA information was sussed out. I'm curious if that's due for a change. Nvidia has a proprietary ISA as well for its Falcon internal media cores, but it's apparently moving to RISC-V.