Would it not have made better sense for PSP to be PS2 90nm chips?

[Akumajou]

I was thinking about this the other day.

I know that PSP is different hardware than PS2 yet is similarly powerfull but I always wondered if Sony should have just waited until the Playstation 2 chips would reach 90nm engineering process shrink (as is in the current PS2 Slim and the EE+GS chip inside the 60GB PS3.

What I am trying to say is other than the die shrink at the same clock speeds of PS2 and lower power requirements if the PSP was made with a 90nm PS2 chips it would mean using the same EXACT dev tools only difference being resolution for the small screen.

Then later a possible further shrink to 65nm would allow for longer battery life, etc.

Anyways please this question is mainly for entertainment pourposes as we know we cannot change history and the PSP is fine as it is even if I will never purchase one myself but the question really made me think about it though.

 

[Cheezdoodles]

basically, your thought is PSP = shrinked ps2 hardware.

That would be freakin awesome

 

[manux]

One would assume power consumption with ps2 chips is jus way too much for a portable. Unless one has a car battery on packpack.

This page notes 45Watts for ps2 slim. Of course that is for whole machine, but you pretty much need all the stuff still for portable(dvd->umd, memory, cpu+gpu, mainboard, wifi, etc.). Even if power consumption was one tenth of that in reality it's still way too much for portable device. Press and public already had lot of gripes with short play time of psp(2-3hours with wifi enabled with 222MHz clock).

You would need to have the power consumption of the ps2 chip way under 1 watt for portable gaming device. Don't forget that in addition to what ps2 provides you would need wifi and big screen sucking that juice from battery. Wifi and display are not present in ps2 slim power consumption equation and do tax the battery considerably.

OffTopic: For me the biggest whine about psp is the ps2 ports. Who wants to play the same games again and again? I would much rather have some new more original titles(locoroco, lumines, etc. rule). Didn't buy any of those gta, jak, etc. titles, because I already played them to boredom with ps2. Not going to buy those same titles to ps3 either if the changes are mainly graphical upgrades without significant improvements to game mechanics. In that sense euphoria seems pretty good and has promise of games that play differently.

 

[archie4oz]

I was thinking about this the other day.

I know that PSP is different hardware than PS2 yet is similarly powerfull but I always wondered if Sony should have just waited until the Playstation 2 chips would reach 90nm engineering process shrink (as is in the current PS2 Slim and the EE+GS chip inside the 60GB PS3.

What do you mean "if" with regards to waiting? The EE+GS@90nm launched before the PSP did, and Allegrex is on the same process anyways and the EE+GS is too large to fit in the PSP.

What I am trying to say is other than the die shrink at the same clock speeds of PS2 and lower power requirements if the PSP was made with a 90nm PS2 chips it would mean using the same EXACT dev tools only difference being resolution for the small screen.

Why preserve the same thing, when you can improve on it?

 

[Panajev2001a]

Why preserve the same thing, when you can improve on it?

Or over-engineer it .

VME, ME, SPRAM, Curved Surfaces support, 1 plane clipping, etc... .

Edit: plus, is the PSP's SoC that much smaller than 86 mm^2 (I forgot the exact figure)? I'd think that power consumption and heat production were more of a concern to them than chip's size...

Pins wise, PSP's SoC is actually hungrier :

540 pins vs 536 for the EE+GS@90nm (different packages of course).

http://archive.chipcenter.com/knowl...rticle.jhtml?printable=true&articleID=9400062

http://common.ziffdavisinternet.com/util_get_image/7/0,1425,sz=1&i=78753,00.jpg
http://www.extremetech.com/slideshow_viewer/0,1205,l=&s=201&a=133950&po=10,00.asp

 

[Darkon]

Or over-engineer it .

VME, ME, SPRAM, Curved Surfaces support, 1 plane clipping, etc... .

SPRAM ?

 

[Panajev2001a]

SPRAM ?

ScratchPad RAM (small pool of SRAM not used as a cache, but as a Local Store basically)

 

[Panajev2001a]

For... a you learn something new everyday:

Design Rule
3D IC technology is attracting such attention all of a sudden because reducing the design rule is having less effect than before in many sectors. As Samsung Electronics has said, even if finer rules are possible technically, there are not as many cases where it makes any practical difference. The utility of a smaller design rule varies with the specific application, and it is expected that 3D IC technology will be adopted first in applications where smaller geometry doesn't provide much benefit anymore.

There are already cases where firms have made a major switch away from pursuing smaller rules and to 3D IC technology. Sony Computer Entertainment Inc (SCE) of Japan recently stopped working on developing smaller design rules for merged DRAM technology and instead introduced chip-on-chip (CoC) technology sandwiching two chips face-to-face with microbumps. The microcontroller for the firm's PSP handheld game system was originally fabricated using 90nm merged DRAM process technology. At the end of 2005, though, SCE switched to CoC, sandwiching the DRAM and logic together as separate chips.

One of the key reasons for the change in policy was that SCE was unable to find any way to make the chip cheaper by switching from 90nm to 65nm merged DRAM process technology. A source at the firm explained: "A massive capital investment would have been needed to drop the design rule to 65nm. And even if we had single-chipped with DRAM and the logic, each demanding a different manufacturing process, it would have taken a long time to get the yield up."

http://techon.nikkeibp.co.jp/article/HONSHI/20070328/129633/

Interesting, I thought that since they were not using SOI for the PSP's CPU that having e-DRAM and logic on the same bulk CMOS manufacturing process EE+GS@90 nm used would have worked, but I did not think at the costs of bringing this chip to 65 nm technology, especially since SCE probably wanted full SOI tech. for their under 90 nm designs (maybe Toshiba's mixed-SOI for logic+bulk CMOS for e-DRAM was much more expensive to actually make practical use of than they thought earlier).

 

[Akumajou]

thanks guys, now I understand alot better that the limits really were huge for Sony in my line of thinking.

 

[Crossbar]

They certainly made some serious die shrinks and redesigns for the Lite & Slim version of the PSP.

Front side of PCB, Slim version to the left.

Back.

Here for more pictures.