Blazkowicz
Legend
Interesting.
My little idea : there aren't really two pools nor different memory, but say there are two 64bit or 32bit ddr3 controllers.
All data is interleaved on all chips (because it's how you get high bandwith). but when going stand by, all game data is discarded ("hibernated" on flash if you need it) ; all OS data that resided on memory chips 2 and 3 get copied to chips 0 and 1.
You can now deactivate one of the controllers and half the memory chips. Then stand-by function can be serviced by one underclocked PowerPC core. Memory can be slowed down and undervolted as well.
This could explain the plain 1GB + 1GB split, say the memory is cut in 4KB pages or byte blocks, "O" stands for OS and "G" stands for game data :
Code:
chip 0 | chip 1 | chip 2 | chip 3
-------+--------+--------+-------
O1 | G1 | O2 | G2
G3 | O3 | G4 | O4copy stuff around and spin down, so to speak :
Code:
chip 0 | chip 1
-------+-------
O1 | O2
O4 | O3(switch O3 and O4 during the copy if you feel it doesn't look good)
Last edited by a moderator:
