Wii U hardware discussion and investigation *rename

[MDX]

That is:
CPU - 2 MB eDRAM L2 cache shared between three cores
GPU - 32 MBs eDRAM workspace
I mean large eDRAM quantities, the typical use for eDRAM which some are believing in here. eDRAM can be replaced with SRAM as cache, although it obviously brings something to the mix regards hitting Nintendo's targets.

Ok, how are you (guys) coming up with the 2MB figure? And has 32 MB for the GPU been confirmed outside of Digital Foundry?

Another question, regarding the MCM.
I had asked in an earlier post if Nintendo would split their 2GB memory into two pools.
Based on what we can see, would Nintendo put 1GB of that memory directly on the
the MCM, maybe as a "chip-stack" package? According to ArsT, they state:

combining components from chip-makers Renesas (RAM), IBM (CPU), and AMD (GPU) on a single component was a challenge

In 2011 AMD came out with: AMD Radeon E6460

an entry-level GPU with more than 2x the performance of the previous-generation Radeon E2400 GPU. To get the desired performance from this GPU—it’s capable of driving four displays simultaneously—AMD elected to use a BGA with the flip-chip GPU die bonded to the BGA package and there are two soldered GDDR5 high-performance graphics SDRAMs on the BGA as well. Thus we have a 3D multichip module (MCM) with the three semiconductor devices bonded to a BGA package that serves as an electrical interposer between the three chips.

Or because of the on chip eDRAM is this unnecessary?

 

[Shifty Geezer]

This is nitpicking for sure, but anyway, not EVERY multicore CPU shares L2 between CPUs.

That's an important clarification in addition to my knee-jerk reaction to Nintendo presenting their mundane technologies as if they are something amazing.

 

[Shifty Geezer]

Integrating the DRAM, you end up compromising both DRAM and logic performance. You also get a more costly process. Steps are needed to create the trench capacitor for the DRAM cells, and all the metal layer steps needed for the logic area are wasted on the DRAM cell.

So what would be the reason for Nintendo to pick eDRAM for cache instead of SRAM? Is there one?

 

[Shifty Geezer]

Ok, how are you (guys) coming up with the 2MB figure?

1)
Rumours
2) Typical size for an L2 cache
3) Larger is no use to a console CPU, especially a low performance part

Or because of the on chip eDRAM is this unnecessary?

I think it's an unnecessary cost. The eDRAM should be a pretty ideal solution for graphics bandwidth in the same way PS2's was, but without the architectural limitations. I think a standard DDR3+ eDRAM solution is perfectly adequate and well balanced for a low cost, low power-consumption device, and if Nintendo wanted to chase more performance, they should be looking at other areas. eg. Increase the CPU performance before worrying about system RAM BW.

 

[Gubbi]

So what would be the reason for Nintendo to pick eDRAM for cache instead of SRAM? Is there one?

Density. For the same amount of RAM eDRAM is still much more dense. The result is a smaller die and lower cost.

Cheers

 

[Shifty Geezer]

Density. For the same amount of RAM eDRAM is still much more dense. The result is a smaller die and lower cost.

Thanks, that's what I thought. And that's in keeping with Nintendo's philosophy.

 

[babybumb]

Well Wii U will be a lot closer to any new machines than Wii was but so will be the 360 that came out a year before the original Wii. Aside from memory there is too little performance gain from Wii U to offset stuff like talent and budgets

So 360 will probably be supported quite a bit longer than the PS2 was with relevant games because it is possible to adapt them there. Wii U would do the same but needs business case

 

[MDX]

1)
Rumours
2) Typical size for an L2 cache
3) Larger is no use to a console CPU, especially a low performance part

Power7 design:

POWER7 processor chips. Each processor chip
contains 2 MB of on-chip L2 cache and 32 MB of eDRAM L3 cache,

Sounds like they left 2MB for the CPU and gave the 32MB to the GPU.
Of course, the 2MB for the Power7 is for 8 cores, which turns out to be 256 KB per core.

2MB Rumor:

The Wii U CPU uses most of the features from the POWER7 architecture, the rumored and leaked specs so far indicate:

4 CPU Cores and 2 MB shared L3 cache

Ok, then I want to bring up a statement by IBM about your point 2, that you will probably shoot down with point three. But we are just speculating:

We heard statements about a lot of edram being used.
And we have IBM saying:

IBM's embedded dynamic random access memory will help deliver a thrilling new game experience to Nintendo fans. The new memory technology, a key element of the new Power microprocessor that IBM is building for the Nintendo Wii U console, can triple the amount of memory contained on a single chip, making for extreme game play.


Tripled based on what? Wii?

64 kB L1 cache (32 kB instruction + 32 kB data)
256 kB L2 cache

256kb x 3 = 768
so
768 x (assuming) 3 cores = 2268KB ?

or,

were they talking about tripling the 2MB to 6MB
shared amongst (assuming) 3 cores that would
give the CPU 2MB per core?

 

[liolio]

Damned where did you read that from? Power7 have 256KB of L2, 4MB of "fast" L3.

 

[Blazkowicz]

This may mean triple the memory per area compared to SRAM and not mean anything else.
It's a way to make a PR statement without providing information, everyone who pays attention knows that edram has bigger density than sram, this haven't changed for a decade.

Some people may interpret this as triple the Xenon's L2, hence 3MB L2 on the new IBM CPU. I have no opinion on 2MB vs 3MB L2 vs something else.

 

[liolio]

The best data I found about edram were in the power a2 papers which are no longer freely available...
In power a2 IBM claimed 50% the area for 20% the power (in power a2 implementation, that means with a L2 cache running at half the cpu clock speed).

 

[MDX]

Damned where did you read that from? Power7 have 256KB of L2, 4MB of "fast" L3.

Different IBM papers.

So a typical Power7 chip has
2MB L2 cache, 32MB L3 cache

Since the typical chip has eight cores.
IBM breaks this down to per core as you stated:
256KB L2 cache and 4MB L3.

 

[Shifty Geezer]

Sounds like they left 2MB for the CPU and gave the 32MB to the GPU.

Sounds more like this chip has squat to do with POWER7. It's a tricore PPC with 2 MBs eDRAM cache. The only reason we have to think there's anything remotely 'POWER 7' about Wii U is a few dubious PR claims and tweets. Step away from that connection and look at the design based on everything else including the rumours and the die shot, and the pieces comfortably fit a pattern. That isn't conclusive, but the evidence is strong.

And we have IBM saying:

IBM's embedded dynamic random access memory will help deliver a thrilling new game experience to Nintendo fans. The new memory technology, a key element of the new Power microprocessor that IBM is building for the Nintendo Wii U console, can triple the amount of memory contained on a single chip, making for extreme game play.


Tripled based on what?

It's as Blazkowicz says; eDRAM provides triple the density for cache. Parsing the phrase correctly, one sees the reference to Wii U is only that it shares the memory tech.

IBM's embedded dynamic random access memory will help deliver a thrilling new game experience to Nintendo fans. The new memory technology...can triple the amount of memory contained on a single chip,

It's a PR statement promoting IBM's eDRAM tech. It tells us nothing about Wii U other than the CPU has eDRAM on it. Now, we know Nintendo like small and low power. We know there's no room on that tiny chip for gobs of eDRAM. We know there's no use for gobs of eDRAM in a console CPU. We know Wii U has eDRAM on this IBM CPU. The logical interpretation is this chip is using eDRAM for its cache.

 

[XpiderMX]

With the info that we have, can we expect a CPU more powerful than Cell or Xenon?

 

[Entropy]

With the info that we have, can we expect a CPU more powerful than Cell or Xenon?

NO.
However, it may be that it has a particularly sympathetic memory subsystem. And it seems likely that the CPU can access the eDRAM on the GPU, which adds both speed and flexibility. But in terms of single precision FLOPS you can be fairly certain that it has lower performance than particularly the BBE. There are other metrics though than peak FLOPS, and it may well be that there are less performance pitfalls (and memory subsystem constraints) than there are for the in-order cores of the PS360, making development a bit smoother. I don't see any reason for concern other than for ports of code developed for the PS3 and 360.

 

[MDX]

With the info that we have, can we expect a CPU more powerful than Cell or Xenon?

wow... stereo.

Too much contention what the CPU is.
Too many rumors mudying the information.
Then the question is, how relevant is the CPU in terms of the console design?
Maybe its not more powerful, and there is no point for it to be.

 

[XpiderMX]

wow... stereo.

Too much contention what the CPU is.
Too many rumors mudying the information.
Then the question is, how relevant is the CPU in terms of the console design?
Maybe its not more powerful, and there is no point for it to be.

What about multi platform development? If Durango and Orbis CPU is stronger than the Wii U CPU (the same for GPU), maybe it can affect the ports (guessing).

 

[kagemaru]

We know Wii U has eDRAM on this IBM CPU. The logical interpretation is this chip is using eDRAM for its cache.

Do we know if the GPU can access the eDRAM in any way? If the rumored amount is true, wouldn't that be a lot for a CPU?

wow... stereo.

Too much contention what the CPU is.
Too many rumors mudying the information.
Then the question is, how relevant is the CPU in terms of the console design?
Maybe its not more powerful, and there is no point for it to be.

If Wii-U owners are seriously expecting next gen ports, and it seems like they already do, then yes there is a point to be more powerful than the current gen systems IMO.

 

[DuckThor Evil]

Do we know if the GPU can access the eDRAM in any way? If the rumored amount is true, wouldn't that be a lot for a CPU?

The rumored high amount of eDRAM IS in the GPU die...CPU has a lot less as a cache.

 

[Kb-Smoker]

It'll be extraordinary for MS or Sony to produce a console with such tiddly components as Wii U is using. That won't be a conventional console. We can comfortably consider that Wii U will be like Wii was this gen compared to next-gen - souped-up last gen hardware that is no rival for the performance of the other two. Nintendo's PR comments are as worthless in that respect as all the other PR we get (and I don't understand why you continue to place faith in it as meaningful).

Maybe not a console but maybe handheld like psp3. I could see it running wiiu games.

This should extend the life of the PS3 by years since they can easily run wiiu version of games. Not sure if MS will support the x360 or drop it like the xbox.

Like I have said many times in the past it seem the performance goal of the wiiu were to run ps360 while using a second screen also. Anything really above that is almost a waste because games will be built of the ps360 and ported to the wiiu.