Wii U hardware discussion and investigation *rename
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Blazkowicz
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Grammar question : what's a match workflow? It can't mean were building games as if we were building cathedral and tower replicas with matches and glue.
I doubt it, that's probably typical power consumption, imo. The power supply is rated a 75W and, imo it will probably be only 80% efficient or so, that will be probably around ~60W max at the WiiU. The WiiU has to be able to handle a degenerate case of the flash memory being accessed, all four USB ports being fully active, wifi and wireless controller link actives, disc drive spinning full speed, and CPU/GPU going all out, with probably some head room. That is unlikely, but possible. You can't have the Wii fail and potentially damage the unit in that case.
Really bad English.
I guess he means the workflow across devices is the same allowing quick cross-platform development, and then exposure to hardware specifics for individual platform optimisations.Megadrive1988
Veteran
Regardless of the number of shader units, gflops, texture units, rops, etc., at least we know the console has 32MB embedded memory. This cannot be a bad thing
Regardless of the number of shader units, gflops, texture units, rops, etc., at least we know the console has 32MB embedded memory. This cannot be a bad thing
And didn't IBM state the CPU has embedded memory, too?
Blazkowicz
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What is the consensus : SoC that integrates everything ruled out, or not?
CPU with eDRAM, paired with a GPU that communicates via a link?
Or even the to dies on an interposer, or packed in some way that allows both low cost and high bandwith.
Or ROPs migrated to the CPU die, if that makes sense.
CPU with eDRAM, paired with a GPU that communicates via a link?
Or even the to dies on an interposer, or packed in some way that allows both low cost and high bandwith.
Or ROPs migrated to the CPU die, if that makes sense.
Given the current power limits I would assume that an SoC is possible, the question is going to be was it practical given they were sourcing a "new" processor and a "new" GPU from two different vendors.
Integration for an SoC could be the reason they ended up with a DX10.X part from AMD, they may have had to lock the GPU design much earlier if IBM did the integration and manufacturing.
Integration for an SoC could be the reason they ended up with a DX10.X part from AMD, they may have had to lock the GPU design much earlier if IBM did the integration and manufacturing.
Blazkowicz
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That makes a lot of sense, after remembering IBM made just such a chip when shrinking the xbox 360 to the same 45nm.
Basically repeating that job, with people that have gained the experience, just using more current designs was the easy and cheap thing. Here it is, an insta cheap console. That clears out the "why the hell is nintendo doing weird things again?" rage.
I also like to think this is the GPU tech AMD had in chipsets, so it was somewhat made to integrate with other components.
Basically repeating that job, with people that have gained the experience, just using more current designs was the easy and cheap thing. Here it is, an insta cheap console. That clears out the "why the hell is nintendo doing weird things again?" rage.
I also like to think this is the GPU tech AMD had in chipsets, so it was somewhat made to integrate with other components.
Megadrive1988
Veteran
So for WiiU we are likely looking at a SoC design like the chip used in Xbox 360 Slim (?)
I forgot the name of this chip and it isn't Valhalla since that name refers to the mb IIRC.
edit: I googled for a few minutes and found the name, it's called Vejle.
I forgot the name of this chip and it isn't Valhalla since that name refers to the mb IIRC.
edit: I googled for a few minutes and found the name, it's called Vejle.
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Regardless of the number of shader units, gflops, texture units, rops, etc., at least we know the console has 32MB embedded memory. This cannot be a bad thing
How do we know this?
I must of missed something.
Interesting, if the CPU and GPU are on one SOC. The GPU then had to be either shrunk from 55nm to 45nm or "grown" from 40nm to 45nm. Maybe that's why they supposedly started with a RV770 (55nm), since it's maybe easier to move down a half node instead of up.
IBM Watson
@IBMWatson
@Strider_BZ @BoostFire @Xbicio WiiU chip clarification: It's a "Power-based microprocessor" http://ibm.co/UhGspo
https://twitter.com/IBMWatson/status/248820933618442240
@IBMWatson
@Strider_BZ @BoostFire @Xbicio WiiU chip clarification: It's a "Power-based microprocessor" http://ibm.co/UhGspo
https://twitter.com/IBMWatson/status/248820933618442240
I hope this isnt the case. Gpu performance would take another nose drive. I hope they drop down to 32nm for the gpu.
There's nothing new here. It's just PR crap that tries to play up the advantages of extra memory (which will look like crap once the next gen consoles launch) and purposefully avoiding the weaknesses of their machine.
It could possibly be a SoC assuming IBM is the one sourcing the edram for the GPU. Not sure of AMD's experience when it comes to making edram outside of Xenos, and I would think IBM offers a better solution anyway considering they've been using it for years now and kick ass with it.
Megadrive1988
Veteran
I could be wrong but doesn't AMD have significant experience with edram because of the Flipper GPU in GameCube, the C1/Xenos GPU in X360 and the Hollywood GPU in Wii?
Blazkowicz
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IBM is the best known maker of edram, using it as L3 two years ago (32MB and 45nm), and as L2 lately. AMD doesn't do it, the edram was, we can say, outside of Xenos.
That was 1T-SRAM I believe on nintendo GPUs, which is not quite the same thing.
That was 1T-SRAM I believe on nintendo GPUs, which is not quite the same thing.
Megadrive1988
Veteran
I don't quite understand.
Doesn't AMD have the collective experience of ArtX and ATI ?
Blazkowicz
Legend
To be pedantic :
- Their edram wasn't really dram. The tech used may have been lost, not suitable for a shrink or just abandoned.
- Even if you could make edram at a point, you have to develop working edram at each new process node and this is probably not trivial. Edram is not that widespread, we would maybe see them in microcontrollers if it were so. /edit : Well, a google search quickly tells me of a 16bit MC with 192K edram and a 32bit one with 1MB, so it's spreading a bit afterall
- Their edram wasn't really dram. The tech used may have been lost, not suitable for a shrink or just abandoned.
- Even if you could make edram at a point, you have to develop working edram at each new process node and this is probably not trivial. Edram is not that widespread, we would maybe see them in microcontrollers if it were so. /edit : Well, a google search quickly tells me of a 16bit MC with 192K edram and a 32bit one with 1MB, so it's spreading a bit afterall
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Sure they do, which pales in comparison to IBM's experience with edram. And 1T SRAM isn't the same as edram. It may be similar, but it's definitely not the same. One would hope IBM's edram tech is being used antd not AMD's.
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