Why a daughter die?

[blakjedi]

In the case of the RSX we have the "Normalizer" ALU in the Pixel Shader but it seems that is not the case of the Xenos.

Is the Xenos Daughter core the equivalent to the "Normalizer" ALU on the Pixel Shaders of the RSX?

Thanks.

What does the normalizer do?

It's a vector math operation,

http://en.wikipedia.org/wiki/Normalized_vector

OK...I thought it was a specialized piece of hardware doing what the logic in the xenos edram does.

 

[seismologist]

Clocks, too?
Do we know the clock rate on the EDRAM daughter die?

I believe 2GHz was tossed around, but I believe that was in the early days of the disclosure of the 256GB/s of bandwidth and the assumption that that was between the daughter die and parent die (when in fact it is between the daughter die logic and eDRAM).

Surely we can make an educated guess.

2 Tb/s on a 2048 bit bus = 1 GHz (double GPU clock - makes sense)

Or 500 MHz on 4096 bit bus (BIG bus!)
Or 2 GHz on 1024 bit bus.

I'd guess 2048 bit bus @ 1GHz.

If they're using the NEC edram it's probably 500mhz.

 

[PC-Engine]

Btw, was no the PS2 eDRAM 4096 bits?

IIRC GS had a 2560-bit bus or around there.

 

[Megadrive1988]

Btw, was no the PS2 eDRAM 4096 bits?

IIRC GS had a 2560-bit bus or around there.

yep 2560-bit bus -

wasn't it something like 1024-bit read, 1024-bit write, 512-bit for texture ?

 

[jvd]

Don't forget that ms can now take advantage of processes .


Edram is much denser and sometimes a process is certified for edram and sometimes its not . So while they wait for that process to be certifed or be capable of edram production , they can still drop the parent die to the smaller micron process and reap better yields on half the chip while they wait to drop the edram micron process

So in the future u may see the parent die at 65nm and the edram at 90nm . Then the parent die at 45nm and the edram at 65nm

 

[3dcgi]

Clocks, too?

Do we know the clock rate on the EDRAM daughter die?

Jawed

Not a good reason. It's not difficult to have multiple clocks with a single die. I refer to recent Nvidia talk for proof.

 

[3dcgi]

In the case of the RSX we have the "Normalizer" ALU in the Pixel Shader but it seems that is not the case of the Xenos.

Is the Xenos Daughter core the equivalent to the "Normalizer" ALU on the Pixel Shaders of the RSX?

Thanks.

The two have nothing in common. All shader processing is done on the parent die.

 

[Jawed]

Clocks, too?

Do we know the clock rate on the EDRAM daughter die?

Jawed

Not a good reason. It's not difficult to have multiple clocks with a single die. I refer to recent Nvidia talk for proof.

I said this a few posts later.

Jawed

 

[LunchBox]

EDIT!!!!

now I'm confused... from dave's article it said its 500 Mhz but from this article it said 2 Ghz :?

can anyone clarify???



from this one...
http://www.beyond3d.com/forum/viewtopic.php?p=528585

EDRAM of 10MB which becomes with one of the feature of Xbox 360-GPU (installed type memory).In orderfor there to be even here, eDRAM of this 10MB is produced by the NEC electronics. This eDRAM is driven at 2GHz data rate, Xbox 360-GPU is connected with interface of 1,024 bit width. The zone rises to 2Tbit=256GB/sec, it is high speed very.

quote from Dave's article...
http://www.beyond3d.com/articles/xenos/index.php?p=02

The Xenos graphics processor is not a single element, but actually consists of two distinct elements: the graphics core (shader core) and the eDRAM module. The shader core is a 90nm chip manufactured by TSMC and is currently slated to run at 500MHz*, whilst the eDRAM module is another 90nm chip, manufactured by NEC and runs at 500MHz* as well. These two chips both exist side by side, together on a single package, ensuring a fast interlink between the two.

 

[coldstorm]

well if clocked at 500Mhz then there is a 4096 bit connection between duaghter die and the edram it self to give the 256 GB/s BW. while there is a 512 bit interface between the parent die and the daughter die to give the 32 GB/s.

 

[Shifty Geezer]

Sounds good. Looks like 500 MHz uniform clock throughout.

 

[LunchBox]

dave was right all along!!!

how foolish of me to doubt him

 

[PC-Engine]

QDR...

 

[Chandler]

this topic name is pretty depressing