What will PS3 use for its CPU ?
- Thread starter Wunderchu
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Megadrive1988
Veteran
2 PUs`PPEs and 16 APUs`SPUs`SPEs on one or two chips.
Its a prototype chip. Transistors are generally not as dense as it can be, even on the same process.
That said, If Sony to launched using 65nm not 90nm, I am still expecting them to put 4 Cells in PS3 (perhaps there will be a high end model), just because at this point its technically doable, and it seems it was their goals to begin with.
Though game developers, probably will only have accessed to one Cell, with the others reserved for other purpose.
I would hope 2 cell chips, each with 2 PPU, 8SPE (edit: 8 SPE EACH of course; 16 total), but like everybody else here I don't know for sure (or lie, to hide the fact they're under NDA... 
)
2 chips would double aggregate memory bandwidth as well as allow twice the total memory. 2 512Mbit XDR devices attached to just one cell would bring a pathetic amount of main memory. Nobody would accept a next-gen console with the same amount of main memory as an xbox development system.
Of course, XDR allows serializing the memory just like all other Rambus memories have in the past so there COULD be more than 128MB main memory with only 2 channels, but I think they'd want to keep it nice and simple with just one device/channel. It also cuts down on latency and improves signal integrity on the mobo...
)2 chips would double aggregate memory bandwidth as well as allow twice the total memory. 2 512Mbit XDR devices attached to just one cell would bring a pathetic amount of main memory. Nobody would accept a next-gen console with the same amount of main memory as an xbox development system.
Of course, XDR allows serializing the memory just like all other Rambus memories have in the past so there COULD be more than 128MB main memory with only 2 channels, but I think they'd want to keep it nice and simple with just one device/channel. It also cuts down on latency and improves signal integrity on the mobo...
hey69 said:
Out of all the possibilities, that's the most unrealistic one.
I say, if they really push it and go 65nm, they could fit 2 cells in there, meaning 2 PPC cores and 16 SPEs TOTAL.
Otherwise they could just keep only one PPC core but add more SPEs to it, although i'd prefer having 2 cores than more SPEs.
Maybe 2 cores with 6 SPEs each?
In the end it will be the decision of the engineers, they will test the kind of performance they will get out of all the different configurations, at a predecided cost level and go from there.
Megadrive1988
Veteran
hey69 said:
that would ALMOST be a Cell 'Mercury News Engine' - the 72 processor beast they said could transform the videogame industry.
heh, your configuration has 68 processors
The more transistors you have and the more heavy are the losses you get with bad yields. Therefore, I don't really expect a 4 PPEs * 8 SPEs CPU.
On the other hand, I wouldn't rule out a MCM made of 4 discrete CPUs (1PPE * 8 SPEs). If and only if the first batch of CPUs produced use the 65nm process, if they start with a 90nm process, even the MCM theory would instantantly be null and void.
On the other hand, I wouldn't rule out a MCM made of 4 discrete CPUs (1PPE * 8 SPEs). If and only if the first batch of CPUs produced use the 65nm process, if they start with a 90nm process, even the MCM theory would instantantly be null and void.
What's the point of a MCM? It would still be as many pins to deal with in a PCB, better just mount em straight on the mobo.
version said:
Huh? :|
zidane1strife
Banned
BE
