two questions: TBDR different style? ; MSAA with eDRAM?

[mboeller]

Hi;

I'm not sure if this is the correct forum for this questions but well:

At the moment I have two questions regarding 3d rendering:

1) eDRAM and MSAA:

Are big backbuffers and Z-Buffers really needed for MSAA when I use eDRAM?

As far as I understand the situation; normaly with MSAA the averaging of the backbuffer is done at scanout because this saves bandwidth and memory is "cheap".

When eDRAM is used this situation changes completely. Onboard bandwidth is now cheap and memory capacity is really expensive.

Therefore wouldn't a 3D-chip with eDRAM use a "read-modify-write" scheme for MSAA for the update of the backbuffer and also for the update of the z-buffer. Therefore the averageing of the buffers is already done during rendering. For example, if a polygon edge only covers a pixel partially the already rendered pixel is read from the eDRAM, then a percentage of the new color is added to the pixel and the averaged pixel is writen back into the eDRAM.

Is something like that possibe?
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2) TBDR different style.

A few weeks ago I saw the abstract of an older (2005) paper from hybrid.fi online when I searched for clues how to distribute the rendering on different chips efficiently. The paper was about an a modified triangle setup engine

Several algorithms that use graphics hardware to accelerate processing require conservative rasterization in order to function correctly. Conservative rasterization stands for either overestimating or underestimating the size of the triangles. Overestimation is carried out by including all pixels that are at least partially overlapped by the triangle, whereas underestimation includes only the pixels that are fully inside the triangle. No or few algorithms for conservative rasterization have been described in the literature, and current hardware does not explicitly support it. Therefore, we present a simple algorithm, which requires only a small modification to the triangle set-up when edge functions are used. Furthermore, the same algorithm can be used for tiled rasterization, where all pixels in a tile (e.g., 8 × 8 pixels) are visited before moving to the next tile.

Link: http://jgt.akpeters.com/papers/AkenineMollerAila05/

Does this paper really describe sort of an TBDR or is this paper about something completely different?


kind regards

Manfred

 

[Novum]

1) No. The GPU can't know the order in which triangles are rendered, so it can't do AA without storing each sample till the whole frame is rendered.

 

[Simon F]

2) TBDR different style.

A few weeks ago I saw the abstract of an older (2005) paper from hybrid.fi online when I searched for clues how to distribute the rendering on different chips efficiently. The paper was about an a modified triangle setup engine:


Link: http://jgt.akpeters.com/papers/AkenineMollerAila05/

Does this paper really describe sort of an TBDR or is this paper about something completely different?

It's a bit difficult to tell since I can't find a link to a free version of the paper.

Having said that, what is described in the abstract sounds very familiar.

 

[Xmas]

As far as I understand the situation; normaly with MSAA the averaging of the backbuffer is done at scanout because this saves bandwidth and memory is "cheap".

Define "normally". AFAIK only one IHV does this, and only in some cases.

Therefore wouldn't a 3D-chip with eDRAM use a "read-modify-write" scheme for MSAA for the update of the backbuffer and also for the update of the z-buffer. Therefore the averageing of the buffers is already done during rendering. For example, if a polygon edge only covers a pixel partially the already rendered pixel is read from the eDRAM, then a percentage of the new color is added to the pixel and the averaged pixel is writen back into the eDRAM.

Is something like that possibe?

That would be coverage AA, not multisampling. And it would be order dependent (or cause color bleeding) along edges since you'd average colors that would actually be hidden by polygons submitted later.

Does this paper really describe sort of an TBDR or is this paper about something completely different?

It's about conservative rasterization and tiled rasterization as the quote suggests. None of this sounds specific to a TBDR.