Except that if you actually play the game in question the score is very useful. Can't say the same for 3dmark and in the case of R600 it doesn't even come close to estimating game performance.
The Official RV630/RV610 Rumours & Speculation Thread
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Except that if you actually play the game in question the score is very useful. Can't say the same for 3dmark and in the case of R600 it doesn't even come close to estimating game performance.
Which was pretty much my point. Along with the fact that 3DMark is optimized to hell and back and has somewhere along the lines of zilch randomness(which aids in optimizing, as you always know what`s going to happen etc.). With a game, any game, you have the odd chance that the player/the benchmarker whilst recording his custom demo for testing performance, will look somewhere where you thought he`d never look, or will turn too fast, or will have two effects on screen at the same time, situation you hadn`t thought about before, forcing you to employ actually meaningful optimizations and a more general approach to fine-tuning your performance. IMHO.
chavvdarrr
Veteran
IMHO, calling this chip "HD 2x00" is simply cheating the buyers.
thatdude90210
Regular
It looks like the HD 2300 does have UVD so it might be perfect for the HTPC crowd.
Silent_Buddha
Legend
RV550 doesn't have UVD does it? So it might be related, but don't think it's the same chip.
Interesting, so the HD 2400 doesn't have the ringbus.
Regards,
SB
Interesting, so the HD 2400 doesn't have the ringbus.
Regards,
SB
chavvdarrr
Veteran
Who wanna bet how many 2300 cards will be HDMI/HDCP enabled via external chip?
Cheating == making lots of people believe that "oh, its 2xxx, so its supports D3D10 "
Same "great" PR as in days of GF4MX, R9000, R9100, R9200...
well one good thing - its not called HD2500
You're forgetting two keywords there. "Mobility Radeon". And isn't it based on M71?
Jawed
Legend
Hmm, I can't think why RV630 has a ring bus either, so the statement that it does rather knocks my understanding of R6xx
Jawed
HD 2400 and realtively few memory controllers being 64-bit and HD 2600 has more.
Jawed
Legend
Hmm, well a ring stop in R600 is 128-bit.
So the idea that RV630 has 64-bit ring stops is intriguing. How three SIMDs are mapped to two ring stops is a bit of a puzzler.
Maybe it's best to think of ring stops being mapped per TU quad? It can't be per RBE quad, because RV630 has only one. I dunno, this really mucks with my conception of screen-space tiled rasterisation.
Then again RV570/560 is mucky, too.
I get the heebie-jeebies thinking of asymmetric distribution of clients around a ring. Sounds like a great way to make the driver developers' lives miserable.
A "ring" with only 2 stops isn't really a ring. If RV630 actually has 4 stops, each of 32-bit, then
Hmm, the die isn't tiny, I suppose it's a possibility.Jawed
Thats entirely dependant on the notebook vendor. However given the primary reasons for choosing this chip for a notebook platform would make sense to include it.
I wouldn't necessarily look at it like that. Plus there is an extra ringstop for PCIe/other I/O.
As far as drivers go, most of it is done automatically. You can tune the memory channels manually if wanted, but thats not necessarily related to the ring organisation.
Jawed
Legend
I don't seem to have much choice, the architecture of the ring is pretty vague. It's hard to discern what priorities might lie in the distribution of clients and the organisation of memory channels...
Hmm, a 3-stop ring, yes I forgot PCI Express, CrossFire. Seems expensive. I'm really struggling to see the benefit of a MC that's in 2 parts (or more) for a "mere" 128-bit bus.
If RV630 didn't have a ring, then the 3 SIMDs and the 2 TUs and the 1 RBE would have to be connected with a crossbar.
The diagrams for R600 seem to show a crossbar which I presume operates between the ring bus and the 4x SIMDs, 1x TU and 1x RBE per ring stop. I presume there's also a crossbar amongst these clients. Or some other kind of bus...
So in designing RV630, perhaps the complexity of implementing a crossbar amongst 4x SIMDs, 2x TUs and 1x RBE makes a ring bus preferable. Or the "overhead" bearable.
It's not the memory channels, per se, that bug me, it's the asymmetric loading patterns across the ring. On the other hand, if the ring has far more bandwidth than the clients (TUs, RBEs, MCs etc.) can use, then maybe the ring is pretty much "invisible". But that brings me back to my first impression, that the ring becomes "expensive" on a die of this size. Maybe it's just that the marginal cost isn't great.
I'm mindful that R6xx is an architecture where the clients of the system bus have many more peers to exchange data with than in older generations of GPUs. Sort of many<->many<->many rather than many<->many. Given that premise, the ring bus might be fundamental even at the scale of only ~16GB/s and up of memory bandwidth.
Also there's the virtualisation in R6xx, where the register file, the constants, textures and other buffers are all virtualised. This requires that the virtualisation system is "fully interconnected" - clients must all have "equal" access to memory. I'm thinking specifically of cache snooping and page table update traffic.
Jawed
http://we.pcinlife.com/thread-779865-1-1.html
Nice... (if RV630XT does not is so weak, as pconline tested)
vertex_shader
Banned
http://we.pcinlife.com/thread-779865-1-1.html
Nice... (if RV630XT does not is so weak, as pconline tested)
That 0.714ns memory in the card rated for 2800mhz, but i don't think so more bw this card need in the first place.
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