So just to add onto this:I'm gonna use this soapbox to do a quick rant about why I hate Intel's chiplet approach:
They are gonna need SO MANY different dies. They are disaggregating so much, and clearly the intent is to try and have some sort of mix-and-match sort of thing going on, but this is never really gonna work, cuz of the constantly varying needs of every separate part. Not to mention that they're gonna need to have varying packaging sizes, including the critical and probably not cheap sort of base interposer(or whatever Intel is calling it) die anytime they want to provide some larger range of products.
And they're gonna struggle with this each and every generation. It would probably be less of an issue if most of these dies were being homegrown, but the fact that they have to produce so many on TSMC means very high design and manufacturing costs for each and every die.
Intel is racing ahead towards 'process leadership' like a lead footed drunk behind the wheel. Maybe they get where they're going, but in what shape will be they be when they get there? And it seems equally likely they crash somewhere along the way cuz they're betting the farm on everything working out, so I doubt they really have much in the way of contingency plans.
Just scares me. I know there's counter arguments for how this might well work out great, and I definitely want to believe so, but man.
It's what's possible, not what they'll do. Meteor Lake is currently 1 confirmed and couple rumored configurations, with GPU and IO tiles being the difference (the only confirmed configuration being the max config)So just to add onto this:
View attachment 9614
This is:
3 x large base tiles
2 x GPU tiles(TSMC 5nm)
2 x SOC tiles(TSMC 6nm)
3 x CPU tiles
3 x I/O tiles
So all in all, that's 13 different tiles they need to produce to offer the scalability they want. And that's just for this series. Sure, some might be salvageable for later series, but it's still a LOT of different chips to have to produce/procure.
And it's just a whole lot of silicon as well. That 6P/8E version is really quite big as a whole.
Really dont like it. The simplicity of AMD's approach just seems so much better.
Right, but the point is this is what they'd NEED to do in order to offer such scalability. Otherwise they're gonna be stuck with quite a limited number of offerings per series. This is their whole strategy going forward, not just with Meteor Lake.It's what's possible, not what they'll do. Meteor Lake is currently 1 confirmed and couple rumored configurations, with GPU and IO tiles being the difference (the only confirmed configuration being the max config)
edit: basedie doesn't need to change size even if the chips on top of it do, as long as it can accomodate the biggest configuration and you're not planning to fit the thing to a smaller package (which Intel has already confirmed they're not doing, with 1 package handling all the use cases instead of 3 of last gen)
You can be limited range per series, it's client stuff. Also you can scale by adding tiles, not just making them bigger.Right, but the point is this is what they'd NEED to do in order to offer such scalability. Otherwise they're gonna be stuck with quite a limited number of offerings per series. This is their whole strategy going forward, not just with Meteor Lake.
Capacity issues on desired processes? They are all on modern processes after all.Btw I think I missed the context of why Intel decided to use TSMC for a bunch of stuff in meteor lake. Sure for the igpu, TSMC probably got better yield at the specs Intel wants. But for the other parts why also by TSMC?
You can be, but Intel tends to like offering large scalability with every series. Gonna be more difficult to do that now unless they just want to keep to manufacturing only the larger dies/packages and using cut down versions of those. At which point I'd just have to wonder what the point of going chiplet was to begin with.You can be limited range per series, it's client stuff.
Yea, there's little other reason when Intel 4 is a decent enough TSMC 5nm equivalent, and they of course also had Intel 7 to use instead of TSMC 6nm.Capacity issues on desired processes? They are all on modern processes after all.
Do they though? It's not that big range from 2 to 24 cores. You can use larger package and smaller dies too.You can be, but Intel tends to like offering large scalability with every series. Gonna be more difficult to do that now unless they just want to keep to manufacturing only the larger dies/packages and using cut down versions of those. At which point I'd just have to wonder what the point of going chiplet was to begin with.
Except when Intel has other stuff to fill all the Intel 4 & 7 capacity they haveYea, there's little other reason when Intel 4 is a decent enough TSMC 5nm equivalent, and they of course also had Intel 7 to use instead of TSMC 6nm.
Windows is 3D since Vista though.I wonder if it wouldn't make sense to split the graphic stack in two, like what they did for compute.
Put the 2D part on the SOC so that it can be used for windows and only use the GPU for heavy duty applications like games.
In a way a 180 going back to the early days of separate 2D cards and 3D accelerators
I was agreeing with you on the last point, by the way. That was my point, too.Do they though? It's not that big range from 2 to 24 cores. You can use larger package and smaller dies too.
Except when Intel has other stuff to fill all the Intel 4 & 7 capacity they have
Yes, it could mean more dies, but realistically in client space you could do with 1 Compute (=CPU) tile as long as you can fit 2 of them in there for highend while lowend uses 1. Every Compute tile Intel has on it's current plans is on in-house processses up to Intel 18A (which if on schedule might actually tilt the scales on who has most advanced process online). Even going to just CPU cores themselves only ones not made in-house are LP-E's because they're part of SoC tile.I was agreeing with you on the last point, by the way. That was my point, too.
As for using smaller dies with a larger package, you can, but it still means having to produce more dies. And when they're doing GPU's and soon reportedly even CPU tiles on leading edge TSMC processes, this is gonna be expensive. It'd be different if they were doing everything with in-house fabs.
My curiosity is just how much money they'd actually save designing and fab'ing a whole new die rather than just using a 'cut down' larger one. Especially if they have to design and fab that die with an expensive TSMC process.Yes, it could mean more dies, but realistically in client space you could do with 1 Compute (=CPU) tile as long as you can fit 2 of them in there for highend while lowend uses 1. Every Compute tile Intel has on it's current plans is on in-house processses up to Intel 18A (which if on schedule might actually tilt the scales on who has most advanced process online). Even going to just CPU cores themselves only ones not made in-house are LP-E's because they're part of SoC tile.
oh well, I was used to seeing him in videos featuring Intel GPUs.... Wish him good luck wherever he goes. On a different note...