The G92 Architecture Rumours & Speculation Thread

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Hmmm I don't think my reference to "something more elegant" was tied in any way to some variation of SLI. Although anything they do come up with is probably derivative of all the work they've put into SLI over the last 3-4 years.
 
If we're assuming homogenous cores, then it seems to me the options are fairly limited and require some close variation of SLI, and I return to my original point. . .

. . .if we're talking about some kind of on-die/on-package integration that is, or nearly is, transparent to the drivers/software, then perhaps I'll let Chalnoth have his familiar rant on the subject. . . :)
 
I found out, that the dual-G92-package could be more serious, than I thought.

But what advantages would bring this to NV, to accept the disadvantages like a 512Bit-MC-like PCB, two heatspots near together? :???:

edit:
Maybe someone here is good in Mandarin and summarize us the text after the graphics, because it seems that there are some interesting thoughts about G92-MCM and higher level connectivity between two cores:
http://www.aiplus.idv.tw/blog/index.php?op=ViewArticle&articleId=1916&blogId=2
 
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Rampage is calling on line 2....

Rys doesn't seem to think so...
http://forum.beyond3d.com/showpost.php?p=1050588&postcount=113 (and following)

I found out, that the dual-G92-package could be more serious, than I thought.

But what advantages would bring this to NV, to accept the disadvantages like a 512Bit-MC-like PCB, two heatspots near together? :???:

edit:
Maybe someone here is good in Mandarin and summarize us the text after the graphics, because it seems that there are some interesting thoughts about G92-MCM and higher level connectivity between two cores:
http://www.aiplus.idv.tw/blog/index.php?op=ViewArticle&articleId=1916&blogId=2

I don't see a problem with getting away about 80-90 Watts per core on a high-end solution like this. After all a high end user price also accomodates a decent cooling solution, so individual heatpipes for both dies could be an option.
 
3dmark points ~10% incrase against the 8800gts640mb.

I thought to know, that a GTS with such processor scores equal or a bit higher.

The G92-data does not sound abstruse, maybe for "8900GT" which goes against 2900GT or 2950GT.

But the "G98-specs" does not make much sense, two clusters with 256Bit and an entry-GPU-codename? ;)
 
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Do not place to much trust into codenames these days. They're - after all - just codenames. :)

And btw: A 8700 that's supposedly faster than an 8800(or an 8900 that's slower than an 8800) does not make much sense either, does it?
 
I thought to know, that a GTS with such processor scores equal or a bit higher.

Last time i checked (~2 months ago) 8800gts640mb score ~8700point with QX6800 under Vista, later drivers so much better under 3dmark? (i can't find any fresh review with 3dmark scores).

The G92-data does not sound abstruse, maybe for "8900GT" which goes against 2900GT or 2950GT.

CJ hint that hd2900gt/pro score in 3dmark2k6 in the 8000-9000 range.
 
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I don't see a problem with getting away about 80-90 Watts per core on a high-end solution like this. After all a high end user price also accomodates a decent cooling solution, so individual heatpipes for both dies could be an option.

80-90 per core is already exceeding the power envelope of R600 and that's before you even add in memory, power transformers, etc... I don't think I'm particularly attracted to a card that would consumer more power than an HD 2900 XT.

Which makes it no wonder that rumors seem to be focused on 2 chips that appear to be quite a bit less powerful than the G80 but in tandem (SLI or some other dual chip tech?) would be greater. Thus keeping power somewhat reasonable while also providing the opportunity for better performance, IF SLI or whatever is used is supported in the game.

It's still nothing I'll use, as I've sworn off SLI/Crossfire until they get multi-monitor working and find a much more elegant solution to using 2 or more GPUs.

Regards,
SB
 
And btw: A 8700 that's supposedly faster than an 8800(or an 8900 that's slower than an 8800) does not make much sense either, does it?
My guess is that the GX2 will be the 8900. It's not the most logical naming scheme ever, but it could be worse if the 8700 isn't much faster on average (or that it's actually slower in certain cases due to lower bandwidth) and that it consumes much less power. We'll see, I could be wrong and maybe their naming is totally ridiculous, or the G92 is horribly slow, heh :)
 
Well, the most the chips in a multichip solution can lag G80 in performance and still match it overall is a factor of 1/n.

It's going to be hard to tease out the power savings for going multichip, mostly because there usually aren't any.

The big question is how much wattage is put out by the few parts of G80 that span the entire chip, such as the arbitration logic and crossbars.
If a GPU has to arbitrate and connect fewer units, there are potential savings since that kind of interconnection usually has a superlinear increase in power consumption for greater width.

However, that amount would have to be balanced against the cost in pushing data traffic that once stayed on-die across board or package IO, which burns much more power for a given amount of data traffic.
 
edit:
Maybe someone here is good in Mandarin and summarize us the text after the graphics, because it seems that there are some interesting thoughts about G92-MCM and higher level connectivity between two cores:
http://www.aiplus.idv.tw/blog/index.php?op=ViewArticle&articleId=1916&blogId=2

Recently possibly really step □□slowed down one □.... Is new in year's end NVIDIA □only can be □slightly changes the funds.

The GeForce 8,700 -- G84 65nm version, or is G98. Former □is 2TPC, latter □is 3TPC.
GeForce 8,950 -- G92, □the mold □□□is 6TPC, most Gao?ban very is possible is □chip MCM.

□□funds Shader possible □□MAD+MUL to alter to MAD+ADD, the revision part are not many, mainly is the cost improvement.
□this □G8x has not supported DX10.1 on □□the integrity, calculated □stops to changes bug also □very much □to use, moreover PCIe 2.0 also □□□....
This □because □bug cannot put up □BR02 □causes the A5 version □coordination, □□□forever □will not be able to kill the AGP city □will supply □.

Looked □□however □has □slightly changes the funds, G8x □accompanies me □to be good again one □.

Moreover, if G98 □□is 3TPC, □□and 6TPC G92 may □become 1:2, Gao?? is □G92 MCM altogether 12TPC, was allowed □Cheng?di to Gao?hao 1:2:4, □□formerly G8x □the dropping variance □to be big in G80 □G84 (□has 4TPC □) □□.

8,/31 □waits ZOL a host □□NVIDIA city □□principle □□, in provides □□above □under □□□:
Http://vga.zol.com.cn/topic/636500.html


Above mentions G92 the 1000M □crystal □. The attention is "□shows the card" □□the crystal □□unfolds □□, is not □GPU... Also the primitive □site G92 □character □has fallen by mask. □□this □□300 □XD

----
□is sufficient one □□□west: How □□does G92 □□□meet □□, its □must return to □□□G8x TCP, as well as CELL computing Board.

□CELL computinb Board □□on, RSX □the XDR deposit and withdrawal efficiency may know that, □the natural □□permanent address, Cache coherency protocol can complete □, □GPU may extremely effective □another □device local memory do □□, therefore its □I □greatly may serially connect many □GPU with □permanent address mapping □, therefore if G92 has 512bit, that □□G92 was allowed 256bit □outside, 256bit 互接 to be allowed; But G92 □chip □so long as seals □on □does not make the integrity 512bit, may □to □□separate.

□however □□□is □□, but □read □□approached very much: Since on □□□(TCP) □has done has cut, that □must do its □only is TPC--ROP in □□the section corssbar cross chip □□□may. After that □front end FIFO workload assignment completes, all □does its □□has on all □Driver □□, that □□efficiency on only remains bottom □I/O overhead, as well as minute □Cheng?? □□□creates some is fragmentary □□, but □all may solve □(□end □□□each □ROP to say □□□all is cuts □disperser).

□□partial also has a □Ming? with BR03 to be good □: GPU BIOS its □on BR03, after □Host says BR03 completely □□identical □GPU, besides can surmount BR03 NVIDIA. □□the above □procedure its □also is advantageous, only is □does □□present Quadro Plex depends on also is BR03, □□the chip □gathers □□likes many □star types □□way □? □but actually □has doubts

Can anyone make sense of what Altavista just told us ? ;)
They seem to compare a multi-G92 board to a multi-Cell processor computing board, in respect to memory organization and interconnect logic.
 
Google do a little better job with the translation :smile:

Not reallly. :cry: This is why I hoped someone is able of reading this Chinese and translate it to us.

What I understand is something, that both MCs can access each other and something about a connection between the crossbars between ROPs and TMUs.

Maybe NV really use some technologie, which they developed for RSX, like FlexIO where it can acess through Cells MC or just speculation a higher level. :D
 
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