some strange reason i have a post to make-re NV30

[RussSchultz]

We all have the right. Just only some people will excercise of it.

 

[KimB]

.13 micron process.
Later launch date.

nVidia has little to no excuse to fail to outperform the R300.

 

[Dave Baumann]

WRT to the level of DX9 compliancy and potential concerns over DX9 spec this is what NVIDIA actually state in reference to NV30:

• Vertex Shaders beyond DirectX 9 - up to 1024 static instructions, with up to 65536 instructions executed in loops, branches and subroutines
• Pixel Shaders beyond DirectX 9 - up to 1024 instructions

 

[KimB]

Oh, and btw, I also do not expect any sort of stellar speed jump.

 

[pascal]

We all have the right. Just only some people will excercise of it.

Should I exercize it or not? But exercize what? We have only a few ISA info.

 

[flf]

Doomtroooper was saying...

I have no problems with your posts but they are not 100 % accurate and save jugement for the offical PR.

Oh, well... that changes everything. As we all know, official PR is the gospel and never deceives.

 

[Mulciber]

I thought DDRII not only sent twice as much data per pin, but also had half the CAS latency of normal DDR AND worked at a much lower voltage?

 

[alexsok]

1. Anyone thought of a possibility of a 256bit memory bus and DDR II memory? That's what R300 based cards will eventually ship with, so I don't see why Nvidia wouldn't follow the same path?

2. It would be a bit premature to think that everything written in the CineFX paper won't make it's appearance in NV30. It's a possbility, but a very slim one.

 

[Doomtrooper]

Doomtroooper was saying...

I have no problems with your posts but they are not 100 % accurate and save jugement for the offical PR.

Oh, well... that changes everything. As we all know, official PR is the gospel and never deceives.

I have friends everywhere

 

[BRiT]

Btw, the DDR2 would have to be around 225-250 (900-1000MHz effective) to do what you're describing. This fits well within current rumors.

How on earth do you figure a clockrate of 225-250 is an effective 900-1000Mhz bandwidth? DDR-2 is NOT QDR. DDR2 is merely revised signalling levels for the layout which enable higher raw speed. DDR-2 will start at 400Mhz which is the same as today's PC3200 DDR.

--|BRiT|

 

[KimB]

If you'll note, I realized that a few posts later...

 

[BRiT]

If you'll note, I realized that a few posts later...

Yeah... Gawd, I read these boards daily and I'm so far behind on everything. There's just been too damn many posts for any reasonable person to keep up with.

I wasn't sure if maybe you were assuming a dual-channel memory layout, like maybe I missed that part in the Nv30 pseudo-spec section or such.

--|BRiT|

 

[WX]

DDR-II Info?

I got the following information from http://www.gen-x-pc.com/new_rambus_and_ddr_info.htm. Is this information true? I have always wondered what benefits would come with DDR-II. It seems that it does increase bandwidth; I thought 2x DDR is going to be named QDR... but now I am confused.

The first spin of DDR technology doubled the performance of standard synchronous DRAM by pumping data bits on both the rising and falling edge of the clock cycle. Macri said the revised version doubles the total bandwidth again by increasing the data fetch from 2 to 4 bits. As a result, the same 100-MHz SDRAM core that became a 200-Mbit/s-per-pin DDR device will jump to 400 Mbits/s per pin with DDR-II.

With a different package and more bandwidth, DDR-II modules will have more pins than the 184 found in today's DDR-I dual-in-line memory modules — probably more than 200 pins. Macri said there is a development push for a single DIMM that will support either chip, and that DDR-II chips will be fully compatible with their predecessors.

 

[KimB]

QDR is an SRAM technology. SRAM is high-speed memory that is usually used for caches.

 

[WX]

So does this mean that DDR-II does have 2x bandwidth?
So wouldn't a 1000 Mhz DDR-II module w/ 128 bit run a lot faster than a 600 Mhz DDR w/ 256-bit? So does the NV30 in fact have closer to 30 GB of bandwidth? I am thoroughly confused as I am unable to find much information on DDR-II technology.

Edit:
R300: 256/8*2*310 = 19,840 MB/s
NV30: 128/8*4*500 = 32,000 MB/s

Does the above make any sense at all?

 

[KimB]

Well, DDR2 cannot have twice the bandwidth. After all, at the same clock speed and bus width, both have the same max theoretical bandwidth. DDR2 may be designed, however, to be able to increase the effective bandwidth.

I think that currently DDR is around 70% efficient in memory bandwidth usage, so it is possible for there to be a noticeable improvement. Apparently DDR2 is also designed to operate at higher clock speeds.

 

[WX]

Also... according to The Inquirer, Samsung's DDR-II Ghz chips each transfer data at 4 GB/s. So if an NV30 has 8 128 Mbit chips, does the following equation make any sense?

4GB/s * 8 = 32GB/s

 

[Thowllly]

Also... according to The Inquirer, Samsung's DDR-II Ghz chips each transfer data at 4 GB/s. So if an NV30 has 8 128 Mbit chips, does the following equation make any sense?

4GB/s * 8 = 32GB/s

Hmm, this question seems familiar...

You will only get 32GB/s if those chips are arranged as a 256 bit bus. If they are arranged as a 128 bit bus, then you will only get 16GB/s.

How to calculate BW:

x GHz (effective clock rate) * y bit (bus width) / 8 (bits in a byte) = z GB/s

That goes for all memory types I can think of. It’s really not very hard, is it?

 

[Geeforcer]

http://www.beyond3d.com/forum/viewtopic.php?t=1816

I guess Ben was right after all, despite his "track record", huh?

 

[BoardBonobo]

But if you implemented two 128bit buses and a memory controller that could interleave the flow, wouldn't that give you a theoretical 32Gb\sec bandwidth?